diff options
| author | Nadav Rotem <nadav.rotem@intel.com> | 2011-05-18 12:26:38 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-05-18 12:26:38 +0000 |
| commit | c5c27ede5501bde34ef0f1428ca74bfe5f46a5bd (patch) | |
| tree | 53d44cbff5dae5d87398e9bc670aeab457a01b68 /llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | |
| parent | 27bd0df352df1570c4de8731d601424aa98afe1d (diff) | |
| download | llvm-c5c27ede5501bde34ef0f1428ca74bfe5f46a5bd.zip llvm-c5c27ede5501bde34ef0f1428ca74bfe5f46a5bd.tar.gz llvm-c5c27ede5501bde34ef0f1428ca74bfe5f46a5bd.tar.bz2 | |
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.
llvm-svn: 131534
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index b301e3b..378e207c 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -892,7 +892,7 @@ unsigned TargetLowering::getVectorTypeBreakdown(LLVMContext &Context, EVT VT, // If there is a wider vector type with the same element type as this one, // we should widen to that legal vector type. This handles things like // <2 x float> -> <4 x float>. - if (NumElts != 1 && getTypeAction(VT) == Promote) { + if (NumElts != 1 && getTypeAction(Context, VT) == Promote) { RegisterVT = getTypeToTransformTo(Context, VT); if (isTypeLegal(RegisterVT)) { IntermediateVT = RegisterVT; |