aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
diff options
context:
space:
mode:
authorStuart Hastings <stuart@apple.com>2011-06-01 18:32:25 +0000
committerStuart Hastings <stuart@apple.com>2011-06-01 18:32:25 +0000
commit3ae49c03a44c8ce5670869cd03a50a30d12560db (patch)
tree3d2e0c448735d74fae4e88148bbf08131af55313 /llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
parentd949eb714ae48dcc025f6e162d74bedca2599363 (diff)
downloadllvm-3ae49c03a44c8ce5670869cd03a50a30d12560db.zip
llvm-3ae49c03a44c8ce5670869cd03a50a30d12560db.tar.gz
llvm-3ae49c03a44c8ce5670869cd03a50a30d12560db.tar.bz2
Fix double FGETSIGN to work on x86_32; followup to 132396.
rdar://problem/5660695 llvm-svn: 132411
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp9
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 6739f1a..bb4df27 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1759,11 +1759,14 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op,
if (NewMask == APInt::getSignBit(Op.getValueType().getSizeInBits()) &&
Op.getOperand(0).getValueType().isFloatingPoint() &&
!Op.getOperand(0).getValueType().isVector()) {
- if (isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType())) {
+ if (isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32)) {
+ EVT Ty = (isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType())) ?
+ Op.getValueType() : MVT::i32;
// Make a FGETSIGN + SHL to move the sign bit into the appropriate
// place. We expect the SHL to be eliminated by other optimizations.
- SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Op.getValueType(),
- Op.getOperand(0));
+ SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Ty, Op.getOperand(0));
+ if (Ty != Op.getValueType())
+ Sign = TLO.DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), Sign);
unsigned ShVal = Op.getValueType().getSizeInBits()-1;
SDValue ShAmt = TLO.DAG.getConstant(ShVal, Op.getValueType());
return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,