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authorDan Gohman <gohman@apple.com>2010-05-01 00:01:06 +0000
committerDan Gohman <gohman@apple.com>2010-05-01 00:01:06 +0000
commit25c1653700d94cd5cbb0bce47ee6687f6379750b (patch)
tree6973e9abe70fd3e21f94b00448a5054638d58250 /llvm/lib/CodeGen/PostRASchedulerList.cpp
parent66ba55a95a6615ce1653dd5940391f3f31da85ce (diff)
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Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches. llvm-svn: 102809
Diffstat (limited to 'llvm/lib/CodeGen/PostRASchedulerList.cpp')
-rw-r--r--llvm/lib/CodeGen/PostRASchedulerList.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/PostRASchedulerList.cpp b/llvm/lib/CodeGen/PostRASchedulerList.cpp
index 79a25ef..d3e1295 100644
--- a/llvm/lib/CodeGen/PostRASchedulerList.cpp
+++ b/llvm/lib/CodeGen/PostRASchedulerList.cpp
@@ -284,7 +284,7 @@ bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) {
MachineInstr *MI = prior(I);
if (isSchedulingBoundary(MI, Fn)) {
Scheduler.Run(MBB, I, Current, CurrentCount);
- Scheduler.EmitSchedule(0);
+ Scheduler.EmitSchedule();
Current = MI;
CurrentCount = Count - 1;
Scheduler.Observe(MI, CurrentCount);
@@ -296,7 +296,7 @@ bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) {
assert((MBB->begin() == Current || CurrentCount != 0) &&
"Instruction count mismatch!");
Scheduler.Run(MBB, MBB->begin(), Current, CurrentCount);
- Scheduler.EmitSchedule(0);
+ Scheduler.EmitSchedule();
// Clean up register live-range state.
Scheduler.FinishBlock();