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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2024-11-26 14:57:09 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-26 14:57:09 -0500 |
| commit | 803bd812b16d1454b8fc0d6d66d7da793408b34d (patch) | |
| tree | 97e0ca0afdf7afdf6a6353325a81dc4875f6041c /llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp | |
| parent | 815069c701d62b58b8dbb6e902931f9eb5185db4 (diff) | |
| download | llvm-803bd812b16d1454b8fc0d6d66d7da793408b34d.zip llvm-803bd812b16d1454b8fc0d6d66d7da793408b34d.tar.gz llvm-803bd812b16d1454b8fc0d6d66d7da793408b34d.tar.bz2 | |
AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_{fp8|bf8}_f32 for gfx950 (#117740)
OPSEL[3] determines low/high 16 bits of word to write.
Co-authored-by: Pravin Jagtap <Pravin.Jagtap@amd.com>
Diffstat (limited to 'llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp')
0 files changed, 0 insertions, 0 deletions