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| author | Ahsan Saghir <saghir@ca.ibm.com> | 2021-05-31 08:52:56 -0500 |
|---|---|---|
| committer | Ahsan Saghir <saghir@ca.ibm.com> | 2021-06-28 09:24:07 -0500 |
| commit | 31ef15e0442ac13135717179d32f438af5bd6ab1 (patch) | |
| tree | 32c7a3a5649bde197eb4fa5d816635ff826489bb /llvm/lib/Bitcode/Reader/BitcodeReader.cpp | |
| parent | c089e29aa47f8833d4370ac1a87a17f7b3a585cf (diff) | |
| download | llvm-31ef15e0442ac13135717179d32f438af5bd6ab1.zip llvm-31ef15e0442ac13135717179d32f438af5bd6ab1.tar.gz llvm-31ef15e0442ac13135717179d32f438af5bd6ab1.tar.bz2 | |
Teach peephole optimizer to not emit sub-register defs
Peephole optimizer should not be introducing sub-reg definitions
as they are illegal in machine SSA phase. This patch modifies
the optimizer to not emit sub-register definitions.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D103408
Diffstat (limited to 'llvm/lib/Bitcode/Reader/BitcodeReader.cpp')
0 files changed, 0 insertions, 0 deletions