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| author | Jay Foad <jay.foad@amd.com> | 2021-09-30 14:18:52 +0100 |
|---|---|---|
| committer | Jay Foad <jay.foad@amd.com> | 2021-10-07 19:50:27 +0100 |
| commit | 5b8befdd026d75562f127a34e0b0584820b03581 (patch) | |
| tree | 256c7cf783625f7b4081dd817897e56b234e5ec9 /lldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.cpp | |
| parent | 42d07bdc400f7acda912bfe889c4961b1413a6a4 (diff) | |
| download | llvm-5b8befdd026d75562f127a34e0b0584820b03581.zip llvm-5b8befdd026d75562f127a34e0b0584820b03581.tar.gz llvm-5b8befdd026d75562f127a34e0b0584820b03581.tar.bz2 | |
[X86] Special-case ADD of two identical registers in convertToThreeAddress
X86InstrInfo::convertToThreeAddress would convert this:
%1:gr32 = ADD32rr killed %0:gr32(tied-def 0), %0:gr32, implicit-def dead $eflags
to this:
undef %2.sub_32bit:gr64 = COPY killed %0:gr32
undef %3.sub_32bit:gr64_nosp = COPY %0:gr32
%1:gr32 = LEA64_32r killed %2:gr64, 1, killed %3:gr64_nosp, 0, $noreg
Note that in the ADD32rr, %0 was used twice and the first use had a kill
flag, which is what MachineInstr::addRegisterKilled does.
In the converted code, each use of %0 is copied to a new reg, and the
first COPY inherits the kill flag from the ADD32rr. This causes
machine verification to fail (if you force it to run after
TwoAddressInstructionPass) because the second COPY uses %0 after it is
killed. Note that machine verification is currently disabled after
TwoAddressInstructionPass but this is a step towards being able to
enable it.
Fix this by not inserting more than one COPY from the same source
register.
Differential Revision: https://reviews.llvm.org/D110829
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.cpp')
0 files changed, 0 insertions, 0 deletions