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| author | William S. Moses <gh@wsmoses.com> | 2025-02-14 18:56:32 -0600 |
|---|---|---|
| committer | William S. Moses <gh@wsmoses.com> | 2025-02-14 18:56:32 -0600 |
| commit | a80e4051f1deb47044211bd411d9230e86953e5c (patch) | |
| tree | 457749faed7f56e3807056feced8fe4dbd21c31c | |
| parent | 625cb5a18576dd5d193da8d0249585cb5245da5c (diff) | |
| download | llvm-users/wm/isnan.zip llvm-users/wm/isnan.tar.gz llvm-users/wm/isnan.tar.bz2 | |
[MLIR][LLVM] Add isnan intrinsicusers/wm/isnan
| -rw-r--r-- | mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td | 2 | ||||
| -rw-r--r-- | mlir/test/Target/LLVMIR/Import/intrinsic.ll | 12 | ||||
| -rw-r--r-- | mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir | 10 |
3 files changed, 24 insertions, 0 deletions
diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td index 72fae1bd..ad431a5 100644 --- a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td +++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td @@ -174,6 +174,8 @@ def LLVM_SinhOp : LLVM_UnaryIntrOpF<"sinh">; def LLVM_CoshOp : LLVM_UnaryIntrOpF<"cosh">; def LLVM_TanhOp : LLVM_UnaryIntrOpF<"tanh">; +def LLVM_IsNanOp : LLVM_UnaryIntrOpF<"isnan">; + class LLVM_MemcpyIntrOpBase<string name> : LLVM_ZeroResultIntrOp<name, [0, 1, 2], [DeclareOpInterfaceMethods<PromotableMemOpInterface>, diff --git a/mlir/test/Target/LLVMIR/Import/intrinsic.ll b/mlir/test/Target/LLVMIR/Import/intrinsic.ll index 249a055..53c52aa 100644 --- a/mlir/test/Target/LLVMIR/Import/intrinsic.ll +++ b/mlir/test/Target/LLVMIR/Import/intrinsic.ll @@ -139,6 +139,16 @@ define void @hyperbolic_trig_test(float %0, <8 x float> %1) { ret void } +; CHECK-LABEL: llvm.func @isnan_test +define void @isnan_test(float %0, <8 x float> %1) { + ; CHECK: llvm.intr.isnan(%{{.*}}) : (f32) -> i1 + %3 = call i1 @llvm.isnan.f32(float %0) + ; CHECK: llvm.intr.isnan(%{{.*}}) : (vector<8xf32>) -> vector<8xi1> + %4 = call <8 x i1> @llvm.sinh.v8f32(<8 x float> %1) + + ret void +} + ; CHECK-LABEL: llvm.func @copysign_test define void @copysign_test(float %0, float %1, <8 x float> %2, <8 x float> %3) { ; CHECK: llvm.intr.copysign(%{{.*}}, %{{.*}}) : (f32, f32) -> f32 @@ -1017,6 +1027,8 @@ declare float @llvm.cosh.f32(float) declare <8 x float> @llvm.cosh.v8f32(<8 x float>) declare float @llvm.tanh.f32(float) declare <8 x float> @llvm.tanh.v8f32(<8 x float>) +declare float @llvm.isnan.f32(float) +declare <8 x float> @llvm.isnan.v8f32(<8 x float>) declare float @llvm.copysign.f32(float, float) declare <8 x float> @llvm.copysign.v8f32(<8 x float>, <8 x float>) declare float @llvm.pow.f32(float, float) diff --git a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir index 2c20878..7661b6e 100644 --- a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir +++ b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir @@ -141,6 +141,16 @@ llvm.func @hyperbolic_trig_test(%arg0: f32, %arg1: vector<8xf32>) { llvm.return } +// CHECK-LABEL: @isnan_test +llvm.func @isnan_test(%arg0: f32, %arg1: vector<8xf32>) { + // CHECK: call i1 @llvm.isnan.f32 + llvm.intr.isnan(%arg0) : (f32) -> i1 + // CHECK: call <8 x i1> @llvm.isnan.v8f32 + llvm.intr.sinh(%arg1) : (vector<8xf32>) -> vector<8xi1> + + llvm.return +} + // CHECK-LABEL: @copysign_test llvm.func @copysign_test(%arg0: f32, %arg1: f32, %arg2: vector<8xf32>, %arg3: vector<8xf32>) { // CHECK: call float @llvm.copysign.f32 |