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| author | Akshat Oke <Akshat.Oke@amd.com> | 2025-04-23 05:15:01 +0000 |
|---|---|---|
| committer | Akshat Oke <Akshat.Oke@amd.com> | 2025-05-02 06:18:13 +0000 |
| commit | 3223a58e1fd06e124f6758f916c44db0047c83cd (patch) | |
| tree | f26703b0957dd0ea9938879068a9c5d8321e92a9 | |
| parent | 704603a3e22550ed8898071637cb9038df12c8d0 (diff) | |
| download | llvm-users/optimisan/stitch-up-ir-codegen.zip llvm-users/optimisan/stitch-up-ir-codegen.tar.gz llvm-users/optimisan/stitch-up-ir-codegen.tar.bz2 | |
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index 0cc803d..f479d13 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -2025,9 +2025,10 @@ void AMDGPUCodeGenPassBuilder::addIRPasses(AddIRPass &addPass) const { // Try to hoist loop invariant parts of divisions AMDGPUCodeGenPrepare may // have expanded. - if (TM.getOptLevel() > CodeGenOptLevel::Less) + if (TM.getOptLevel() > CodeGenOptLevel::Less) { addPass(createFunctionToLoopPassAdaptor(LICMPass(LICMOptions()), /*UseMemorySSA=*/true)); + } } Base::addIRPasses(addPass); |