diff options
| author | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2026-01-08 17:30:02 +0000 |
|---|---|---|
| committer | Christudasan Devadasan <Christudasan.Devadasan@amd.com> | 2026-01-13 03:50:24 +0000 |
| commit | 12d1aa0c8430c9d8015bfb285aae7d5e260db8ad (patch) | |
| tree | 80904eb5911c8b0ee9736c6c916460994d4cd11c | |
| parent | 74adfaf612775e2ac27f59873b2f61a184cebd53 (diff) | |
| download | llvm-users/cdevadas/precommit-subreg-reload-test.zip llvm-users/cdevadas/precommit-subreg-reload-test.tar.gz llvm-users/cdevadas/precommit-subreg-reload-test.tar.bz2 | |
compacted the virt-reg numbersusers/cdevadas/precommit-subreg-reload-test
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/regpressure-mitigation-with-subreg-reload.mir | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/regpressure-mitigation-with-subreg-reload.mir b/llvm/test/CodeGen/AMDGPU/regpressure-mitigation-with-subreg-reload.mir index 4328923..a0993d7 100644 --- a/llvm/test/CodeGen/AMDGPU/regpressure-mitigation-with-subreg-reload.mir +++ b/llvm/test/CodeGen/AMDGPU/regpressure-mitigation-with-subreg-reload.mir @@ -16,22 +16,22 @@ machineFunctionInfo: frameOffsetReg: '$sgpr33' stackPtrOffsetReg: '$sgpr32' body: | - bb.0.entry: + bb.0: liveins: $vgpr1, $sgpr0_sgpr1, $sgpr2_sgpr3 - %8:vgpr_32 = COPY $vgpr1 - %12:vreg_64 = COPY killed renamable $sgpr0_sgpr1 - %11:vreg_128 = FLAT_LOAD_DWORDX4 %12, 0, 0, implicit $exec, implicit $flat_scr - undef early-clobber %49.sub0_sub1:vreg_128, $sgpr_null = V_MAD_U64_U32_gfx11_e64 %11.sub0, 42, 0, 0, implicit $exec - undef %50.sub0:vreg_64 = COPY %49.sub1 - early-clobber %49.sub1_sub2:vreg_128, $sgpr_null = V_MAD_U64_U32_gfx11_e64 %11.sub1, 42, %50, 0, implicit $exec - early-clobber %15:vreg_64, $sgpr_null = V_MAD_U64_U32_gfx11_e64 %11.sub2, 42, 0, 0, implicit $exec - undef %52.sub0:vreg_64 = COPY %15.sub1 - early-clobber %27:vreg_64, $sgpr_null = V_MAD_U64_U32_gfx11_e64 %11.sub3, 42, %52, 0, implicit $exec - %49.sub2:vreg_128 = COPY %15.sub0 - %49.sub3:vreg_128 = COPY %27.sub0 - $vgpr31 = COPY %8 + %1:vgpr_32 = COPY $vgpr1 + %2:vreg_64 = COPY killed renamable $sgpr0_sgpr1 + %3:vreg_128 = FLAT_LOAD_DWORDX4 %2, 0, 0, implicit $exec, implicit $flat_scr + undef early-clobber %4.sub0_sub1:vreg_128, $sgpr_null = V_MAD_U64_U32_gfx11_e64 %3.sub0, 42, 0, 0, implicit $exec + undef %5.sub0:vreg_64 = COPY %4.sub1 + early-clobber %4.sub1_sub2:vreg_128, $sgpr_null = V_MAD_U64_U32_gfx11_e64 %3.sub1, 42, %5, 0, implicit $exec + early-clobber %6:vreg_64, $sgpr_null = V_MAD_U64_U32_gfx11_e64 %3.sub2, 42, 0, 0, implicit $exec + undef %7.sub0:vreg_64 = COPY %6.sub1 + early-clobber %8:vreg_64, $sgpr_null = V_MAD_U64_U32_gfx11_e64 %3.sub3, 42, %7, 0, implicit $exec + %4.sub2:vreg_128 = COPY %6.sub0 + %4.sub3:vreg_128 = COPY %8.sub0 + $vgpr31 = COPY %1 INLINEASM &"; use v1", 1, 327690, $vgpr1 - FLAT_STORE_DWORDX4 %12, %49, 0, 0, implicit $exec, implicit $flat_scr + FLAT_STORE_DWORDX4 %2, %4, 0, 0, implicit $exec, implicit $flat_scr SI_RETURN ... |