From 1f921a93e4fd0b5ccd18a3e7d5a0511bcd2464fa Mon Sep 17 00:00:00 2001 From: Joseph Myers Date: Wed, 25 May 2016 16:53:23 +0000 Subject: Do not raise "inexact" from powerpc32 ceil, floor, trunc (bug 15479). Continuing fixes for ceil, floor and trunc functions not to raise the "inexact" exception, this patch fixes the versions used on older powerpc32 processors. As was done with the round implementations some time ago, the save of floating-point state is moved after the first floating-point operation on the input to ensure that any "invalid" exception from signaling NaN input is included in the saved state, and then the whole state gets restored rather than just the rounding mode. This has no effect on configurations using the power5+ code, since such processors can do these operations with a single instruction (and those instructions do not set "inexact", so are correct for TS 18661-1 semantics). Tested for powerpc32. [BZ #15479] * sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Move save of floating-point state after first floating-point operation on input. Restore full floating-point state instead of just rounding mode. * sysdeps/powerpc/powerpc32/fpu/s_ceilf.S (__ceilf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_floor.S (__floor): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_floorf.S (__floorf): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_trunc.S (__trunc): Likewise. * sysdeps/powerpc/powerpc32/fpu/s_truncf.S (__truncf): Likewise. --- sysdeps/powerpc/powerpc32/fpu/s_ceil.S | 9 ++++++--- sysdeps/powerpc/powerpc32/fpu/s_ceilf.S | 9 ++++++--- sysdeps/powerpc/powerpc32/fpu/s_floor.S | 9 ++++++--- sysdeps/powerpc/powerpc32/fpu/s_floorf.S | 9 ++++++--- sysdeps/powerpc/powerpc32/fpu/s_trunc.S | 9 ++++++--- sysdeps/powerpc/powerpc32/fpu/s_truncf.S | 9 ++++++--- 6 files changed, 36 insertions(+), 18 deletions(-) (limited to 'sysdeps') diff --git a/sysdeps/powerpc/powerpc32/fpu/s_ceil.S b/sysdeps/powerpc/powerpc32/fpu/s_ceil.S index 48d6d0d..07d031e 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_ceil.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_ceil.S @@ -26,7 +26,6 @@ .section ".text" ENTRY (__ceil) - mffs fp11 /* Save current FPU rounding mode. */ #ifdef SHARED mflr r11 cfi_register(lr,r11) @@ -42,6 +41,8 @@ ENTRY (__ceil) fabs fp0,fp1 fsub fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,2 /* Set rounding mode toward +inf. */ @@ -50,7 +51,8 @@ ENTRY (__ceil) fsub fp1,fp1,fp13 /* x-= TWO52; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -59,7 +61,8 @@ ENTRY (__ceil) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__ceil) diff --git a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S index c70fd44..3987e24 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_ceilf.S @@ -25,7 +25,6 @@ .section ".text" ENTRY (__ceilf) - mffs fp11 /* Save current FPU rounding mode. */ #ifdef SHARED mflr r11 cfi_register(lr,r11) @@ -41,6 +40,8 @@ ENTRY (__ceilf) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,2 /* Set rounding mode toward +inf. */ @@ -49,7 +50,8 @@ ENTRY (__ceilf) fsubs fp1,fp1,fp13 /* x-= TWO23; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -58,7 +60,8 @@ ENTRY (__ceilf) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__ceilf) diff --git a/sysdeps/powerpc/powerpc32/fpu/s_floor.S b/sysdeps/powerpc/powerpc32/fpu/s_floor.S index 3f84465..b951666 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_floor.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_floor.S @@ -26,7 +26,6 @@ .section ".text" ENTRY (__floor) - mffs fp11 /* Save current FPU rounding mode. */ #ifdef SHARED mflr r11 cfi_register(lr,r11) @@ -42,6 +41,8 @@ ENTRY (__floor) fabs fp0,fp1 fsub fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,3 /* Set rounding mode toward -inf. */ @@ -50,7 +51,8 @@ ENTRY (__floor) fsub fp1,fp1,fp13 /* x-= TWO52; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -59,7 +61,8 @@ ENTRY (__floor) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__floor) diff --git a/sysdeps/powerpc/powerpc32/fpu/s_floorf.S b/sysdeps/powerpc/powerpc32/fpu/s_floorf.S index 55ac526..64b87b1 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_floorf.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_floorf.S @@ -25,7 +25,6 @@ .section ".text" ENTRY (__floorf) - mffs fp11 /* Save current FPU rounding mode. */ #ifdef SHARED mflr r11 cfi_register(lr,r11) @@ -41,6 +40,8 @@ ENTRY (__floorf) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,3 /* Set rounding mode toward -inf. */ @@ -49,7 +50,8 @@ ENTRY (__floorf) fsubs fp1,fp1,fp13 /* x-= TWO23; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -58,7 +60,8 @@ ENTRY (__floorf) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__floorf) diff --git a/sysdeps/powerpc/powerpc32/fpu/s_trunc.S b/sysdeps/powerpc/powerpc32/fpu/s_trunc.S index c8aa2fb..260b4fd 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_trunc.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_trunc.S @@ -33,7 +33,6 @@ .section ".text" ENTRY (__trunc) - mffs fp11 /* Save current FPU rounding mode. */ #ifdef SHARED mflr r11 cfi_register(lr,r11) @@ -49,6 +48,8 @@ ENTRY (__trunc) fabs fp0,fp1 fsub fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,1 /* Set rounding toward 0 mode. */ @@ -57,7 +58,8 @@ ENTRY (__trunc) fsub fp1,fp1,fp13 /* x-= TWO52; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -66,7 +68,8 @@ ENTRY (__trunc) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__trunc) diff --git a/sysdeps/powerpc/powerpc32/fpu/s_truncf.S b/sysdeps/powerpc/powerpc32/fpu/s_truncf.S index e47ee96..6c2c959 100644 --- a/sysdeps/powerpc/powerpc32/fpu/s_truncf.S +++ b/sysdeps/powerpc/powerpc32/fpu/s_truncf.S @@ -32,7 +32,6 @@ .section ".text" ENTRY (__truncf) - mffs fp11 /* Save current FPU rounding mode. */ #ifdef SHARED mflr r11 cfi_register(lr,r11) @@ -48,6 +47,8 @@ ENTRY (__truncf) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,1 /* Set rounding toward 0 mode. */ @@ -56,7 +57,8 @@ ENTRY (__truncf) fsubs fp1,fp1,fp13 /* x-= TWO23; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -65,7 +67,8 @@ ENTRY (__truncf) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__truncf) -- cgit v1.1