From 0fed0b250f728f38bca5f6fba1dcecdccfc6a44e Mon Sep 17 00:00:00 2001 From: Joe Ramsay Date: Thu, 16 May 2024 09:21:24 +0100 Subject: aarch64/fpu: Add vector variants of pow Plus a small amount of moving includes around in order to be able to remove duplicate definition of asuint64. Reviewed-by: Szabolcs Nagy --- sysdeps/unix/sysv/linux/aarch64/libmvec.abilist | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'sysdeps/unix/sysv') diff --git a/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist b/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist index 89ac1df..b685106 100644 --- a/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist +++ b/sysdeps/unix/sysv/linux/aarch64/libmvec.abilist @@ -93,6 +93,8 @@ GLIBC_2.40 _ZGVnN2v_tanh F GLIBC_2.40 _ZGVnN2v_tanhf F GLIBC_2.40 _ZGVnN2vv_hypot F GLIBC_2.40 _ZGVnN2vv_hypotf F +GLIBC_2.40 _ZGVnN2vv_pow F +GLIBC_2.40 _ZGVnN2vv_powf F GLIBC_2.40 _ZGVnN4v_acoshf F GLIBC_2.40 _ZGVnN4v_asinhf F GLIBC_2.40 _ZGVnN4v_atanhf F @@ -103,6 +105,7 @@ GLIBC_2.40 _ZGVnN4v_erff F GLIBC_2.40 _ZGVnN4v_sinhf F GLIBC_2.40 _ZGVnN4v_tanhf F GLIBC_2.40 _ZGVnN4vv_hypotf F +GLIBC_2.40 _ZGVnN4vv_powf F GLIBC_2.40 _ZGVsMxv_acosh F GLIBC_2.40 _ZGVsMxv_acoshf F GLIBC_2.40 _ZGVsMxv_asinh F @@ -123,3 +126,5 @@ GLIBC_2.40 _ZGVsMxv_tanh F GLIBC_2.40 _ZGVsMxv_tanhf F GLIBC_2.40 _ZGVsMxvv_hypot F GLIBC_2.40 _ZGVsMxvv_hypotf F +GLIBC_2.40 _ZGVsMxvv_pow F +GLIBC_2.40 _ZGVsMxvv_powf F -- cgit v1.1