From 6c575d835edf166c16695e47732b175abf6f99ef Mon Sep 17 00:00:00 2001 From: Adhemerval Zanella Date: Thu, 2 Jan 2025 16:12:34 -0300 Subject: aarch64: Use 64-bit variable to access the special registers clang issues: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths] while tryng to use 32 bit variables with 'mrs' to get/set the fpsr, dczid_el0, and ctr. --- sysdeps/unix/sysv/linux/aarch64/cpu-features.c | 2 +- sysdeps/unix/sysv/linux/aarch64/sysconf.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'sysdeps/unix/sysv/linux') diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c index 26cf6d4..7ac2283 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.c +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.c @@ -128,7 +128,7 @@ init_cpu_features (struct cpu_features *cpu_features) cpu_features->midr_el1 = midr; /* Check if ZVA is enabled. */ - unsigned dczid; + uint64_t dczid; asm volatile ("mrs %0, dczid_el0" : "=r"(dczid)); if ((dczid & DCZID_DZP_MASK) == 0) diff --git a/sysdeps/unix/sysv/linux/aarch64/sysconf.c b/sysdeps/unix/sysv/linux/aarch64/sysconf.c index c0df3af..eec2453 100644 --- a/sysdeps/unix/sysv/linux/aarch64/sysconf.c +++ b/sysdeps/unix/sysv/linux/aarch64/sysconf.c @@ -27,7 +27,7 @@ static long int linux_sysconf (int name); long int __sysconf (int name) { - unsigned ctr; + uint64_t ctr; /* Unfortunately, the registers that contain the actual cache info (CCSIDR_EL1, CLIDR_EL1, and CSSELR_EL1) are protected by the Linux -- cgit v1.1