From eae47a361821b60ad4274feae1d6e3fa4572cd0a Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Wed, 14 Mar 2012 16:29:47 -0700 Subject: Add framework for using sparc VIS3 instructions, use it for copysign/signbit. * sysdeps/sparc/configure.in: New file. * sysdeps/sparc/configure: Generate. * configure.in (libc_cv_sparc_as_vis3): Substitute. * configure: Regenerate. * config.h.in (HAVE_AS_VIS3_SUPPORT): New. * config.make.in (have-as-vis3): New. * sysdeps/sparc/sparc32/sparcv9/Makefile (ASFLAGS-*): If VIS3 is available use -Av9d instead of -Av9a. * sysdeps/sparc/sparc64/Makefile: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S: New file. --- sysdeps/sparc/sparc64/Makefile | 9 ++++ sysdeps/sparc/sparc64/fpu/multiarch/Makefile | 9 ++++ .../sparc/sparc64/fpu/multiarch/s_signbit-vis3.S | 25 ++++++++++ sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S | 57 ++++++++++++++++++++++ .../sparc/sparc64/fpu/multiarch/s_signbitf-vis3.S | 25 ++++++++++ sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S | 46 +++++++++++++++++ 6 files changed, 171 insertions(+) create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/Makefile create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-vis3.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-vis3.S create mode 100644 sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S (limited to 'sysdeps/sparc/sparc64') diff --git a/sysdeps/sparc/sparc64/Makefile b/sysdeps/sparc/sparc64/Makefile index fb8b011..2b7b830 100644 --- a/sysdeps/sparc/sparc64/Makefile +++ b/sysdeps/sparc/sparc64/Makefile @@ -6,3 +6,12 @@ endif ifeq ($(subdir),string) sysdep_routines += align-cpy endif + +ifeq ($(have-as-vis3),yes) +ASFLAGS-.o += -Wa,-Av9d +ASFLAGS-.os += -Wa,-Av9d +ASFLAGS-.op += -Wa,-Av9d +ASFLAGS-.og += -Wa,-Av9d +ASFLAGS-.ob += -Wa,-Av9d +ASFLAGS-.oS += -Wa,-Av9d +endif diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile new file mode 100644 index 0000000..b03884d --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile @@ -0,0 +1,9 @@ +ifeq ($(subdir),math) +ifeq ($(have-as-vis3),yes) +libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 +sysdep_routines += s_signbitf-vis3 s_signbit-vis3 + +CFLAGS-s_signbitf-vis3.S = -Wa,-Av9d +CFLAGS-s_signbit-vis3.S = -Wa,-Av9d +endif +endif \ No newline at end of file diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-vis3.S new file mode 100644 index 0000000..8d54e32 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-vis3.S @@ -0,0 +1,25 @@ +/* signbit(). sparc64 vis3 version. + Copyright (C) 2012 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +ENTRY (__signbit_vis3) + movdtox %f0, %o0 + retl + srlx %o0, 63, %o0 +END (__signbit_vis3) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S new file mode 100644 index 0000000..a8e9728 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S @@ -0,0 +1,57 @@ +#include + + .text +ENTRY(__signbit) + .type __signbit, @gnu_indirect_function +# ifdef SHARED + SETUP_PIC_REG_LEAF(o3, o5) +# endif +# ifdef HAVE_AS_VIS3_SUPPORT + set HWCAP_SPARC_VIS3, %o1 + andcc %o0, %o1, %g0 + be 9f + nop +# ifdef SHARED + sethi %gdop_hix22(__signbit_vis3), %o1 + xor %o1, %gdop_lox10(__signbit_vis3), %o1 +# else + set __signbit_vis3, %o1 +# endif + ba 10f + nop +9: +# endif +# ifdef SHARED + sethi %gdop_hix22(__signbit_generic), %o1 + xor %o1, %gdop_lox10(__signbit_generic), %o1 +# else + set __signbit_generic, %o1 +# endif +# ifdef HAVE_AS_VIS3_SUPPORT +10: +# endif +# ifdef SHARED + add %o3, %o1, %o1 +# endif + retl + mov %o1, %o0 +END(__signbit) +weak_alias (__signbit, signbit) + +/* On 64-bit the double version will also always work for + long-double-precision since in both cases the word with the + sign bit in it is passed always in register %f0. */ +strong_alias (__signbit, __signbitl) +hidden_def (__signbitl) +weak_alias (__signbitl, signbitl) + +# undef weak_alias +# define weak_alias(a, b) +# undef strong_alias +# define strong_alias(a, b) +# undef hidden_def +# define hidden_def(a) + +#define __signbit __signbit_generic + +#include "../s_signbit.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-vis3.S new file mode 100644 index 0000000..004b087 --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-vis3.S @@ -0,0 +1,25 @@ +/* signbitf(). sparc64 vis3 version. + Copyright (C) 2012 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +ENTRY (__signbitf_vis3) + movstouw %f1, %o0 + retl + srl %o0, 31, %o0 +END (__signbitf_vis3) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S new file mode 100644 index 0000000..721bc7f --- /dev/null +++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S @@ -0,0 +1,46 @@ +#include + + .text +ENTRY(__signbitf) + .type __signbitf, @gnu_indirect_function +# ifdef SHARED + SETUP_PIC_REG_LEAF(o3, o5) +# endif +# ifdef HAVE_AS_VIS3_SUPPORT + set HWCAP_SPARC_VIS3, %o1 + andcc %o0, %o1, %g0 + be 9f + nop +# ifdef SHARED + sethi %gdop_hix22(__signbitf_vis3), %o1 + xor %o1, %gdop_lox10(__signbitf_vis3), %o1 +# else + set __signbitf_vis3, %o1 +# endif + ba 10f + nop +9: +# endif +# ifdef SHARED + sethi %gdop_hix22(__signbitf_generic), %o1 + xor %o1, %gdop_lox10(__signbitf_generic), %o1 +# else + set __signbitf_generic, %o1 +# endif +# ifdef HAVE_AS_VIS3_SUPPORT +10: +# endif +# ifdef SHARED + add %o3, %o1, %o1 +# endif + retl + mov %o1, %o0 +END(__signbitf) +weak_alias (__signbitf, signbitf) + +# undef weak_alias +# define weak_alias(a, b) + +#define __signbitf __signbitf_generic + +#include "../s_signbitf.S" -- cgit v1.1