From eb927a26faa1da06990596b28842f788d8831329 Mon Sep 17 00:00:00 2001 From: Sunil K Pandey Date: Mon, 7 Mar 2022 10:47:12 -0800 Subject: x86_64: Fix svml_s_exp2f16_core_avx512.S code formatting This commit contains following formatting changes 1. Instructions proceeded by a tab. 2. Instruction less than 8 characters in length have a tab between it and the first operand. 3. Instruction greater than 7 characters in length have a space between it and the first operand. 4. Tabs after `#define`d names and their value. 5. 8 space at the beginning of line replaced by tab. 6. Indent comments with code. 7. Remove redundent .text section. 8. 1 space between line content and line comment. 9. Space after all commas. Reviewed-by: Noah Goldstein --- .../fpu/multiarch/svml_s_exp2f16_core_avx512.S | 379 ++++++++++----------- 1 file changed, 189 insertions(+), 190 deletions(-) diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_exp2f16_core_avx512.S b/sysdeps/x86_64/fpu/multiarch/svml_s_exp2f16_core_avx512.S index 5bff29a..5b406c6 100644 --- a/sysdeps/x86_64/fpu/multiarch/svml_s_exp2f16_core_avx512.S +++ b/sysdeps/x86_64/fpu/multiarch/svml_s_exp2f16_core_avx512.S @@ -52,220 +52,219 @@ /* Offsets for data table __svml_sexp2_data_internal_avx512 */ -#define Frac_PowerS0 0 -#define poly_coeff1 64 -#define poly_coeff2 128 -#define poly_coeff3 192 -#define add_const 256 -#define AbsMask 320 -#define Threshold 384 +#define Frac_PowerS0 0 +#define poly_coeff1 64 +#define poly_coeff2 128 +#define poly_coeff3 192 +#define add_const 256 +#define AbsMask 320 +#define Threshold 384 #include - .text - .section .text.exex512,"ax",@progbits + .section .text.exex512, "ax", @progbits ENTRY(_ZGVeN16v_exp2f_skx) - pushq %rbp - cfi_def_cfa_offset(16) - movq %rsp, %rbp - cfi_def_cfa(6, 16) - cfi_offset(6, -16) - andq $-64, %rsp - subq $192, %rsp - vmovups add_const+__svml_sexp2_data_internal_avx512(%rip), %zmm3 - -/* - * Reduced argument - * where VREDUCE is available - */ - vreduceps $65, {sae}, %zmm0, %zmm6 - vmovups poly_coeff3+__svml_sexp2_data_internal_avx512(%rip), %zmm5 - vmovups poly_coeff2+__svml_sexp2_data_internal_avx512(%rip), %zmm10 - vmovups Threshold+__svml_sexp2_data_internal_avx512(%rip), %zmm2 - -/* - * - * HA - * Variables and constants - * Load constants and vector(s) - */ - vmovups poly_coeff1+__svml_sexp2_data_internal_avx512(%rip), %zmm7 - -/* - * Integer form of K+0.b1b2b3b4 in lower bits - call K_plus_f0 - * Mantisssa of normalized single precision FP: 1.b1b2...b23 - */ - vaddps {rd-sae}, %zmm3, %zmm0, %zmm4 - vandps AbsMask+__svml_sexp2_data_internal_avx512(%rip), %zmm0, %zmm1 - -/* c3*r + c2 */ - vfmadd231ps {rn-sae}, %zmm6, %zmm5, %zmm10 - vcmpps $30, {sae}, %zmm2, %zmm1, %k0 - -/* c3*r^2 + c2*r + c1 */ - vfmadd213ps {rn-sae}, %zmm7, %zmm6, %zmm10 - -/* Table value: 2^(0.b1b2b3b4) */ - vpermps __svml_sexp2_data_internal_avx512(%rip), %zmm4, %zmm9 - kmovw %k0, %edx - -/* T*r */ - vmulps {rn-sae}, %zmm6, %zmm9, %zmm8 - -/* T + (T*r*(c3*r^2 + c2*r + c1) */ - vfmadd213ps {rn-sae}, %zmm9, %zmm8, %zmm10 - -/* Scaling placed at the end to avoid accuracy loss when T*r*scale underflows */ - vscalefps {rn-sae}, %zmm0, %zmm10, %zmm1 - testl %edx, %edx - -/* Go to special inputs processing branch */ - jne L(SPECIAL_VALUES_BRANCH) - # LOE rbx r12 r13 r14 r15 edx zmm0 zmm1 - -/* Restore registers - * and exit the function - */ + pushq %rbp + cfi_def_cfa_offset(16) + movq %rsp, %rbp + cfi_def_cfa(6, 16) + cfi_offset(6, -16) + andq $-64, %rsp + subq $192, %rsp + vmovups add_const+__svml_sexp2_data_internal_avx512(%rip), %zmm3 + + /* + * Reduced argument + * where VREDUCE is available + */ + vreduceps $65, {sae}, %zmm0, %zmm6 + vmovups poly_coeff3+__svml_sexp2_data_internal_avx512(%rip), %zmm5 + vmovups poly_coeff2+__svml_sexp2_data_internal_avx512(%rip), %zmm10 + vmovups Threshold+__svml_sexp2_data_internal_avx512(%rip), %zmm2 + + /* + * + * HA + * Variables and constants + * Load constants and vector(s) + */ + vmovups poly_coeff1+__svml_sexp2_data_internal_avx512(%rip), %zmm7 + + /* + * Integer form of K+0.b1b2b3b4 in lower bits - call K_plus_f0 + * Mantisssa of normalized single precision FP: 1.b1b2...b23 + */ + vaddps {rd-sae}, %zmm3, %zmm0, %zmm4 + vandps AbsMask+__svml_sexp2_data_internal_avx512(%rip), %zmm0, %zmm1 + + /* c3*r + c2 */ + vfmadd231ps {rn-sae}, %zmm6, %zmm5, %zmm10 + vcmpps $30, {sae}, %zmm2, %zmm1, %k0 + + /* c3*r^2 + c2*r + c1 */ + vfmadd213ps {rn-sae}, %zmm7, %zmm6, %zmm10 + + /* Table value: 2^(0.b1b2b3b4) */ + vpermps __svml_sexp2_data_internal_avx512(%rip), %zmm4, %zmm9 + kmovw %k0, %edx + + /* T*r */ + vmulps {rn-sae}, %zmm6, %zmm9, %zmm8 + + /* T + (T*r*(c3*r^2 + c2*r + c1) */ + vfmadd213ps {rn-sae}, %zmm9, %zmm8, %zmm10 + + /* Scaling placed at the end to avoid accuracy loss when T*r*scale underflows */ + vscalefps {rn-sae}, %zmm0, %zmm10, %zmm1 + testl %edx, %edx + + /* Go to special inputs processing branch */ + jne L(SPECIAL_VALUES_BRANCH) + # LOE rbx r12 r13 r14 r15 edx zmm0 zmm1 + + /* Restore registers + * and exit the function + */ L(EXIT): - vmovaps %zmm1, %zmm0 - movq %rbp, %rsp - popq %rbp - cfi_def_cfa(7, 8) - cfi_restore(6) - ret - cfi_def_cfa(6, 16) - cfi_offset(6, -16) - -/* Branch to process - * special inputs - */ + vmovaps %zmm1, %zmm0 + movq %rbp, %rsp + popq %rbp + cfi_def_cfa(7, 8) + cfi_restore(6) + ret + cfi_def_cfa(6, 16) + cfi_offset(6, -16) + + /* Branch to process + * special inputs + */ L(SPECIAL_VALUES_BRANCH): - vmovups %zmm0, 64(%rsp) - vmovups %zmm1, 128(%rsp) - # LOE rbx r12 r13 r14 r15 edx zmm1 - - xorl %eax, %eax - # LOE rbx r12 r13 r14 r15 eax edx - - vzeroupper - movq %r12, 16(%rsp) - /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */ - .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22 - movl %eax, %r12d - movq %r13, 8(%rsp) - /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */ - .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22 - movl %edx, %r13d - movq %r14, (%rsp) - /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */ - .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22 - # LOE rbx r15 r12d r13d - -/* Range mask - * bits check - */ + vmovups %zmm0, 64(%rsp) + vmovups %zmm1, 128(%rsp) + # LOE rbx r12 r13 r14 r15 edx zmm1 + + xorl %eax, %eax + # LOE rbx r12 r13 r14 r15 eax edx + + vzeroupper + movq %r12, 16(%rsp) + /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */ + .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22 + movl %eax, %r12d + movq %r13, 8(%rsp) + /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */ + .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22 + movl %edx, %r13d + movq %r14, (%rsp) + /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */ + .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22 + # LOE rbx r15 r12d r13d + + /* Range mask + * bits check + */ L(RANGEMASK_CHECK): - btl %r12d, %r13d + btl %r12d, %r13d -/* Call scalar math function */ - jc L(SCALAR_MATH_CALL) - # LOE rbx r15 r12d r13d + /* Call scalar math function */ + jc L(SCALAR_MATH_CALL) + # LOE rbx r15 r12d r13d -/* Special inputs - * processing loop - */ + /* Special inputs + * processing loop + */ L(SPECIAL_VALUES_LOOP): - incl %r12d - cmpl $16, %r12d - -/* Check bits in range mask */ - jl L(RANGEMASK_CHECK) - # LOE rbx r15 r12d r13d - - movq 16(%rsp), %r12 - cfi_restore(12) - movq 8(%rsp), %r13 - cfi_restore(13) - movq (%rsp), %r14 - cfi_restore(14) - vmovups 128(%rsp), %zmm1 - -/* Go to exit */ - jmp L(EXIT) - /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */ - .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22 - /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */ - .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22 - /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */ - .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22 - # LOE rbx r12 r13 r14 r15 zmm1 - -/* Scalar math fucntion call - * to process special input - */ + incl %r12d + cmpl $16, %r12d + + /* Check bits in range mask */ + jl L(RANGEMASK_CHECK) + # LOE rbx r15 r12d r13d + + movq 16(%rsp), %r12 + cfi_restore(12) + movq 8(%rsp), %r13 + cfi_restore(13) + movq (%rsp), %r14 + cfi_restore(14) + vmovups 128(%rsp), %zmm1 + + /* Go to exit */ + jmp L(EXIT) + /* DW_CFA_expression: r12 (r12) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -176; DW_OP_plus) */ + .cfi_escape 0x10, 0x0c, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x50, 0xff, 0xff, 0xff, 0x22 + /* DW_CFA_expression: r13 (r13) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -184; DW_OP_plus) */ + .cfi_escape 0x10, 0x0d, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x48, 0xff, 0xff, 0xff, 0x22 + /* DW_CFA_expression: r14 (r14) (DW_OP_lit8; DW_OP_minus; DW_OP_const4s: -64; DW_OP_and; DW_OP_const4s: -192; DW_OP_plus) */ + .cfi_escape 0x10, 0x0e, 0x0e, 0x38, 0x1c, 0x0d, 0xc0, 0xff, 0xff, 0xff, 0x1a, 0x0d, 0x40, 0xff, 0xff, 0xff, 0x22 + # LOE rbx r12 r13 r14 r15 zmm1 + + /* Scalar math fucntion call + * to process special input + */ L(SCALAR_MATH_CALL): - movl %r12d, %r14d - movss 64(%rsp,%r14,4), %xmm0 - call exp2f@PLT - # LOE rbx r14 r15 r12d r13d xmm0 + movl %r12d, %r14d + movss 64(%rsp, %r14, 4), %xmm0 + call exp2f@PLT + # LOE rbx r14 r15 r12d r13d xmm0 - movss %xmm0, 128(%rsp,%r14,4) + movss %xmm0, 128(%rsp, %r14, 4) -/* Process special inputs in loop */ - jmp L(SPECIAL_VALUES_LOOP) - # LOE rbx r15 r12d r13d + /* Process special inputs in loop */ + jmp L(SPECIAL_VALUES_LOOP) + # LOE rbx r15 r12d r13d END(_ZGVeN16v_exp2f_skx) - .section .rodata, "a" - .align 64 + .section .rodata, "a" + .align 64 #ifdef __svml_sexp2_data_internal_avx512_typedef typedef unsigned int VUINT32; typedef struct { - __declspec(align(64)) VUINT32 Frac_PowerS0[16][1]; - __declspec(align(64)) VUINT32 poly_coeff1[16][1]; - __declspec(align(64)) VUINT32 poly_coeff2[16][1]; - __declspec(align(64)) VUINT32 poly_coeff3[16][1]; - __declspec(align(64)) VUINT32 add_const[16][1]; - __declspec(align(64)) VUINT32 AbsMask[16][1]; - __declspec(align(64)) VUINT32 Threshold[16][1]; + __declspec(align(64)) VUINT32 Frac_PowerS0[16][1]; + __declspec(align(64)) VUINT32 poly_coeff1[16][1]; + __declspec(align(64)) VUINT32 poly_coeff2[16][1]; + __declspec(align(64)) VUINT32 poly_coeff3[16][1]; + __declspec(align(64)) VUINT32 add_const[16][1]; + __declspec(align(64)) VUINT32 AbsMask[16][1]; + __declspec(align(64)) VUINT32 Threshold[16][1]; } __svml_sexp2_data_internal_avx512; #endif __svml_sexp2_data_internal_avx512: - /*== Frac_PowerS0 ==*/ - .long 0x3F800000 - .long 0x3F85AAC3 - .long 0x3F8B95C2 - .long 0x3F91C3D3 - .long 0x3F9837F0 - .long 0x3F9EF532 - .long 0x3FA5FED7 - .long 0x3FAD583F - .long 0x3FB504F3 - .long 0x3FBD08A4 - .long 0x3FC5672A - .long 0x3FCE248C - .long 0x3FD744FD - .long 0x3FE0CCDF - .long 0x3FEAC0C7 - .long 0x3FF5257D - .align 64 - .long 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222 /*== poly_coeff1 ==*/ - .align 64 - .long 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B /*== poly_coeff2 ==*/ - .align 64 - .long 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA /*== poly_coeff3 ==*/ - .align 64 - .long 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000 /* add_const */ - .align 64 - .long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff /* AbsMask */ - .align 64 - .long 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000 /* Threshold=126.0 */ - .align 64 - .type __svml_sexp2_data_internal_avx512,@object - .size __svml_sexp2_data_internal_avx512,.-__svml_sexp2_data_internal_avx512 + /* Frac_PowerS0 */ + .long 0x3F800000 + .long 0x3F85AAC3 + .long 0x3F8B95C2 + .long 0x3F91C3D3 + .long 0x3F9837F0 + .long 0x3F9EF532 + .long 0x3FA5FED7 + .long 0x3FAD583F + .long 0x3FB504F3 + .long 0x3FBD08A4 + .long 0x3FC5672A + .long 0x3FCE248C + .long 0x3FD744FD + .long 0x3FE0CCDF + .long 0x3FEAC0C7 + .long 0x3FF5257D + .align 64 + .long 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222, 0x3F317222 /* == poly_coeff1 == */ + .align 64 + .long 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B, 0x3E75F16B /* == poly_coeff2 == */ + .align 64 + .long 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA, 0x3D6854CA /* == poly_coeff3 == */ + .align 64 + .long 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000, 0x49400000 /* add_const */ + .align 64 + .long 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff /* AbsMask */ + .align 64 + .long 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000, 0x42fc0000 /* Threshold=126.0 */ + .align 64 + .type __svml_sexp2_data_internal_avx512, @object + .size __svml_sexp2_data_internal_avx512, .-__svml_sexp2_data_internal_avx512 -- cgit v1.1