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2024-01-01x86/cet: Add -fcf-protection=none before -fcf-protection=branchH.J. Lu1-4/+4
2024-01-01Update copyright dates with scripts/update-copyrightsPaul Eggert136-136/+136
2024-01-01x86/cet: Run some CET tests with shadow stackH.J. Lu4-0/+17
2024-01-01x86/cet: Don't set CET active by defaultH.J. Lu2-2/+15
2024-01-01x86/cet: Check feature_1 in TCB for active IBT and SHSTKH.J. Lu3-1/+35
2024-01-01x86/cet: Enable shadow stack during startupH.J. Lu6-93/+93
2024-01-01x86/cet: Sync with Linux kernel 6.6 shadow stack interfaceH.J. Lu2-6/+11
2023-12-20x86/cet: Don't disable CET if not single threadedH.J. Lu1-2/+9
2023-12-20x86: Modularize sysdeps/x86/dl-cet.cH.J. Lu1-176/+280
2023-12-19Fix elf: Do not duplicate the GLIBC_TUNABLES stringH.J. Lu1-1/+1
2023-12-19Fix elf: Do not duplicate the GLIBC_TUNABLES stringH.J. Lu1-5/+5
2023-12-19i686: Do not raise exception traps on fesetexcept (BZ 30989)Adhemerval Zanella1-18/+5
2023-12-19elf: Do not duplicate the GLIBC_TUNABLES stringAdhemerval Zanella3-75/+193
2023-12-19x86/cet: Check CPU_FEATURE_ACTIVE in permissive modeH.J. Lu2-0/+6
2023-12-19x86/cet: Check legacy shadow stack code in .init_array sectionH.J. Lu11-0/+330
2023-12-19x86/cet: Add tests for GLIBC_TUNABLES=glibc.cpu.hwcaps=-SHSTKH.J. Lu3-0/+28
2023-12-19x86/cet: Check CPU_FEATURE_ACTIVE when CET is disabledH.J. Lu3-0/+9
2023-12-19x86/cet: Check legacy shadow stack applicationsH.J. Lu6-0/+130
2023-12-18x86/cet: Don't assume that SHSTK implies IBTH.J. Lu3-11/+11
2023-12-17x86/cet: Check user_shstk in /proc/cpuinfoH.J. Lu1-1/+1
2023-12-11x86: Check PT_GNU_PROPERTY earlyH.J. Lu1-40/+80
2023-12-11sysdeps/x86/Makefile: Split and sort testsH.J. Lu1-32/+78
2023-11-21x86: Use dl-symbol-redir-ifunc.h on cpu-tunablesAdhemerval Zanella1-27/+12
2023-09-29x86: Add support for AVX10 preset and vec size in cpu-featuresNoah Goldstein4-3/+71
2023-08-29x86: Check the lower byte of EAX of CPUID leaf 2 [BZ #30643]H.J. Lu1-18/+13
2023-08-11x86: Fix incorrect scope of setting `shared_per_thread` [BZ# 30745]Noah Goldstein1-4/+3
2023-08-06x86: Fix for cache computation on AMD legacy cpus.Sajan Karumanchi1-27/+199
2023-07-27<sys/platform/x86.h>: Add APX supportH.J. Lu4-0/+11
2023-07-18[PATCH v1] x86: Use `3/4*sizeof(per-thread-L3)` as low bound for NT threshold.Noah Goldstein1-3/+12
2023-07-18x86: Fix slight bug in `shared_per_thread` cache size calculation.Noah Goldstein1-2/+2
2023-07-17configure: Use autoconf 2.71Siddhesh Poyarekar1-46/+52
2023-06-26x86: Make dl-cache.h and readelflib.c not Linux-specificSergey Bugaev1-0/+90
2023-06-19Fix misspellings -- BZ 25337Paul Pluzhnikov2-2/+2
2023-06-12x86: Make the divisor in setting `non_temporal_threshold` cpu specificNoah Goldstein4-26/+51
2023-06-12x86: Refactor Intel `init_cpu_features`Noah Goldstein1-81/+309
2023-06-12x86: Increase `non_temporal_threshold` to roughly `sizeof_L3 / 4`Noah Goldstein1-27/+43
2023-06-02Fix a few more typos I missed in previous round -- BZ 25337Paul Pluzhnikov1-1/+1
2023-05-30Fix misspellings in sysdeps/ -- BZ 25337Paul Pluzhnikov3-3/+3
2023-05-27x86: Use 64MB as nt-store threshold if no cacheinfo [BZ #30429]Noah Goldstein1-1/+9
2023-04-05<sys/platform/x86.h>: Add PREFETCHI supportH.J. Lu4-0/+7
2023-04-05<sys/platform/x86.h>: Add AMX-COMPLEX supportH.J. Lu4-0/+8
2023-04-05<sys/platform/x86.h>: Add AVX-NE-CONVERT supportH.J. Lu4-0/+8
2023-04-05<sys/platform/x86.h>: Add AVX-VNNI-INT8 supportH.J. Lu4-0/+17
2023-04-05<sys/platform/x86.h>: Add MSRLIST supportH.J. Lu2-0/+2
2023-04-05<sys/platform/x86.h>: Add AVX-IFMA supportH.J. Lu4-0/+8
2023-04-05<sys/platform/x86.h>: Add AMX-FP16 supportH.J. Lu4-0/+8
2023-04-05<sys/platform/x86.h>: Add WRMSRNS supportH.J. Lu2-0/+2
2023-04-05<sys/platform/x86.h>: Add ArchPerfmonExt supportH.J. Lu2-0/+2
2023-04-05<sys/platform/x86.h>: Add CMPCCXADD supportH.J. Lu4-0/+7
2023-04-05<sys/platform/x86.h>: Add LASS supportH.J. Lu2-0/+2
generated by cgit v1.1 at 2024-11-04 14:29:56 +0000