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path: root/sysdeps/x86/cpu-tunables.c
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2021-03-29x86: Set Prefer_No_VZEROUPPER and add Prefer_AVX2_STRCMPH.J. Lu1-0/+2
2021-03-29x86: Properly disable XSAVE related features [BZ #27605]H.J. Lu1-0/+1
2021-01-02Update copyright dates with scripts/update-copyrightsPaul Eggert1-1/+1
2020-07-13x86: Support usable check for all CPU featuresH.J. Lu1-106/+62
2020-06-22x86: Update CPU feature detection [BZ #26149]H.J. Lu1-7/+7
2020-05-18x86: Move CET control to _dl_x86_feature_control [BZ #25887]H.J. Lu1-25/+6
2020-01-01Update copyright dates with scripts/update-copyrights.Joseph Myers1-1/+1
2019-09-07Prefer https to http for gnu.org and fsf.org URLsPaul Eggert1-1/+1
2019-01-01Update copyright dates with scripts/update-copyrights.Joseph Myers1-1/+1
2018-08-02Rename the glibc.tune namespace to glibc.cpuSiddhesh Poyarekar1-2/+2
2018-07-16x86: Support IBT and SHSTK in Intel CET [BZ #21598]H.J. Lu1-0/+48
2018-05-21x86-64: Check Prefer_FSRM in ifunc-memmove.hH.J. Lu1-0/+2
2018-01-01Update copyright dates with scripts/update-copyrights.Joseph Myers1-1/+1
2017-10-20x86-64: Use fxsave/xsave/xsavec in _dl_runtime_resolve [BZ #21265]H.J. Lu1-7/+10
2017-09-12x86: Add MathVec_Prefer_No_AVX512 to cpu-features [BZ #21967]H.J. Lu1-0/+7
2017-08-14x86: Add IBT/SHSTK bits to cpu-featuresH.J. Lu1-0/+2
2017-06-21x86: Rename glibc.tune.ifunc to glibc.tune.hwcapsH.J. Lu1-18/+11
2017-06-20tunables: Add IFUNC selection and cache sizesH.J. Lu1-0/+330