| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2021-02-22 | x86: Remove unused variables for raw cache sizes from cacheinfo.h | Florian Weimer | 1 | -12/+0 |
| 2021-02-02 | x86: Adding an upper bound for Enhanced REP MOVSB. | Sajan Karumanchi | 1 | -0/+4 |
| 2021-01-14 | x86: Move x86 processor cache info to cpu_features | H.J. Lu | 1 | -373/+27 |
| 2021-01-02 | Update copyright dates with scripts/update-copyrights | Paul Eggert | 1 | -1/+1 |
| 2020-10-28 | x86: Restore processing of cache size tunables in init_cacheinfo | Florian Weimer | 1 | -8/+4 |
| 2020-10-28 | x86: Optimizing memcpy for AMD Zen architecture. | Sajan Karumanchi | 1 | -6/+26 |
| 2020-10-16 | x86: Initialize CPU info via IFUNC relocation [BZ 26203] | H.J. Lu | 1 | -0/+413 |
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index : riscv-gnu-toolchain/glibc.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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