| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-01-01 | Update copyright dates with scripts/update-copyrights | Paul Eggert | 5 | -5/+5 |
| 2021-01-02 | Update copyright dates with scripts/update-copyrights | Paul Eggert | 5 | -5/+5 |
| 2020-08-27 | RISC-V: Build infrastructure for 32-bit port | Zong Li | 3 | -0/+5 |
| 2020-08-27 | RISC-V: Fix llrint and llround missing exceptions on RV32 | Zong Li | 1 | -0/+38 |
| 2020-08-27 | RISC-V: Add the RV32 libm-test-ulps | Alistair Francis | 2 | -0/+1406 |
| 2020-08-27 | RISC-V: Add hard float support for 32-bit CPUs | Zong Li | 4 | -0/+124 |
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index : riscv-gnu-toolchain/glibc.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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