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2015-08-14Remove incorrect register mov in floorf/nearbyint on x86_64hjl/plt/2.21Siddhesh Poyarekar2-2/+0
The change in 0b5395f052ee09cd7e3d219af4e805c38058afb5 replaced calls to __get_cpu_features@plt followed by a mov from rax to rdx, with a single macro LOAD_RTLD_GLOBAL_RO_RDX. It is pretty clear that there was a typo in s_floorf and __nearbyint due to which the (now incorrect) mov was not removed. This patch removes that mov. * sysdeps/x86_64/fpu/multiarch/s_floorf.S (__floorf): Remove unnecessary movq. * sysdeps/x86_64/fpu/multiarch/s_nearbyint.S (__nearbyint): Likewise.
2015-08-03Don't run tst-getpid2 with LD_BIND_NOW=1H.J. Lu1-5/+0
Since _dl_x86_64_save_sse and _dl_x86_64_restore_sse are removed now, we don't need to run tst-getpid2 with LD_BIND_NOW=1. * nptl/Makefile (tst-getpid2-ENV): Removed.
2015-08-03Use SSE optimized strcmp in x86-64 ld.soH.J. Lu1-253/+216
Since ld.so preserves vector registers now, we can SSE optimized strcmp in x86-64 ld.so. * sysdeps/x86_64/strcmp.S: Remove "#if !IS_IN (libc)".
2015-08-03Remove x86-64 rtld-xxx.c and rtld-xxx.SH.J. Lu6-464/+0
Since ld.so preserves vector registers now, we can use the regular, non-ifunc string and memory functions in ld.so. * sysdeps/x86_64/rtld-memcmp.c: Removed. * sysdeps/x86_64/rtld-memset.S: Likewise. * sysdeps/x86_64/rtld-strchr.S: Likewise. * sysdeps/x86_64/rtld-strlen.S: Likewise. * sysdeps/x86_64/multiarch/rtld-memcmp.c: Likewise. * sysdeps/x86_64/multiarch/rtld-memset.S: Likewise.
2015-08-03Replace %xmm8 with %xmm0H.J. Lu1-26/+26
Since ld.so preserves vector registers now, we can use %xmm0 to avoid the REX prefix. * sysdeps/x86_64/memset.S: Replace %xmm8 with %xmm0.
2015-08-03Replace %xmm[8-12] with %xmm[0-4]H.J. Lu1-47/+47
Since ld.so preserves vector registers now, we can use %xmm[0-4] to avoid the REX prefix. * sysdeps/x86_64/strlen.S: Replace %xmm[8-12] with %xmm[0-4].
2015-08-03Don't disable SSE in x86-64 ld.soH.J. Lu3-11/+14
Since ld.so preserves vector registers now, we can use SSE in ld.so. * sysdeps/i386/Makefile [$(subdir) == elf] (CFLAGS-.os): Add -mno-sse -mno-mmx for $(all-rtld-routines). [$(subdir) == elf] (tests-special): Add $(objpfx)tst-ld-sse-use.out. [$(subdir) == elf] ($(objpfx)tst-ld-sse-use.out): New rule. * sysdeps/x86/Makefile [$(subdir) == elf] (CFLAGS-.os): Removed. [$(subdir) == elf] (tests-special): Likewise. [$(subdir) == elf] ($(objpfx)tst-ld-sse-use.out): Likewise. * sysdeps/x86_64/Makefile [$(subdir) == elf] (CFLAGS-.os): Add -mno-mmx for $(all-rtld-routines).
2015-08-03Save and restore vector registers in x86-64 ld.soH.J. Lu8-501/+472
This patch initiaizes GLRO(dl_x86_xstate) in dl_platform_init to indicate if the processor supports SSE, AVX or AVX512. It uses this information to properly save and restore vector registers in ld.so. Now we can use SSE in ld.so and delete FOREIGN_CALL macros. [BZ #15128] * sysdeps/x86_64/Makefile [$(subdir) == elf] (tests): Add ifuncmain8. (modules-names): Add ifuncmod8. ($(objpfx)ifuncmain8): New rule. * sysdeps/x86_64/dl-machine.h: Include <dl-procinfo.h> and <cpuid.h>. (elf_machine_runtime_setup): Use _dl_runtime_resolve_sse, _dl_runtime_resolve_avx, or _dl_runtime_resolve_avx512, _dl_runtime_profile_sse, _dl_runtime_profile_avx, or _dl_runtime_profile_avx512, based on HAS_ARCH_FEATURE. * sysdeps/x86_64/dl-trampoline.S: Rewrite. * sysdeps/x86_64/dl-trampoline.h: Likewise. * sysdeps/x86_64/ifuncmain8.c: New file. * sysdeps/x86_64/ifuncmod8.c: Likewise. * sysdeps/x86_64/nptl/tcb-offsets.sym (RTLD_SAVESPACE_SSE): Removed. * sysdeps/x86_64/nptl/tls.h (__128bits): Removed. (tcbhead_t): Change rtld_must_xmm_save to __glibc_unused1. Change rtld_savespace_sse to __glibc_unused2. (RTLD_CHECK_FOREIGN_CALL): Removed. (RTLD_ENABLE_FOREIGN_CALL): Likewise. (RTLD_PREPARE_FOREIGN_CALL): Likewise. (RTLD_FINALIZE_FOREIGN_CALL): Likewise.
2015-08-03Align stack when calling __errno_locationH.J. Lu3-0/+18
We should align stack to 16 bytes when calling __errno_location. [BZ #18661] * sysdeps/x86_64/fpu/s_cosf.S (__cosf): Align stack to 16 bytes when calling __errno_location. * sysdeps/x86_64/fpu/s_sincosf.S (__sincosf): Likewise. * sysdeps/x86_64/fpu/s_sinf.S (__sinf): Likewise.
2015-08-03Align stack to 16 bytes when calling __gettimeofdayH.J. Lu1-4/+5
Subtract stack by 24 bytes instead of 16 bytes so that stack is aligned to 16 bytes when calling __gettimeofday. [BZ #18661] * sysdeps/unix/sysv/linux/x86_64/lowlevellock.S (__lll_timedwait_tid): Align stack to 16 bytes when calling __gettimeofday.
2015-08-03Align stack to 16 bytes when calling __setcontextH.J. Lu1-2/+2
Don't use pop to restore %rdi so that stack is aligned to 16 bytes when calling __setcontext. [BZ #18661] * sysdeps/unix/sysv/linux/x86_64/__start_context.S (__start_context): Don't use pop to restore %rdi so that stack is aligned to 16 bytes when calling __setcontext.
2015-08-03Compile {memcpy,strcmp}-sse2-unaligned.S only for libcH.J. Lu2-0/+8
{memcpy,strcmp}-sse2-unaligned.S aren't needed in ld.so. * sysdeps/x86_64/multiarch/memcpy-sse2-unaligned.S: Compile only for libc. * sysdeps/x86_64/multiarch/strcmp-sse2-unaligned.S: Likewise.
2015-08-03Update x86 elision-conf.c for <cpu-features.h>H.J. Lu1-2/+2
This patch updates x86 elision-conf.c to use the newly defined HAS_CPU_FEATURE from <cpu-features.h>. * sysdeps/unix/sysv/linux/x86/elision-conf.c (elision_init): Replace HAS_RTM with HAS_CPU_FEATURE (RTM).
2015-08-03Update i686 multiarch functions for <cpu-features.h>H.J. Lu38-887/+356
This patch updates i686 multiarch functions to use the newly defined HAS_CPU_FEATURE, HAS_ARCH_FEATURE, LOAD_GOT_AND_RTLD_GLOBAL_RO and LOAD_FUNC_GOT_EAX from <cpu-features.h>. * sysdeps/i386/i686/fpu/multiarch/e_expf.c: Replace HAS_XXX with HAS_CPU_FEATURE/HAS_ARCH_FEATURE (XXX). * sysdeps/i386/i686/fpu/multiarch/s_cosf.c: Likewise. * sysdeps/i386/i686/fpu/multiarch/s_cosf.c: Likewise. * sysdeps/i386/i686/fpu/multiarch/s_sincosf.c: Likewise. * sysdeps/i386/i686/fpu/multiarch/s_sinf.c: Likewise. * sysdeps/i386/i686/multiarch/ifunc-impl-list.c: Likewise. * sysdeps/i386/i686/multiarch/s_fma.c: Likewise. * sysdeps/i386/i686/multiarch/s_fmaf.c: Likewise. * sysdeps/i386/i686/multiarch/bcopy.S: Remove __init_cpu_features call. Merge SHARED and !SHARED. Add LOAD_GOT_AND_RTLD_GLOBAL_RO. Use LOAD_FUNC_GOT_EAX to load function address. Replace HAS_XXX with HAS_CPU_FEATURE/HAS_ARCH_FEATURE (XXX). * sysdeps/i386/i686/multiarch/bzero.S: Likewise. * sysdeps/i386/i686/multiarch/memchr.S: Likewise. * sysdeps/i386/i686/multiarch/memcmp.S: Likewise. * sysdeps/i386/i686/multiarch/memcpy.S: Likewise. * sysdeps/i386/i686/multiarch/memcpy_chk.S: Likewise. * sysdeps/i386/i686/multiarch/memmove.S: Likewise. * sysdeps/i386/i686/multiarch/memmove_chk.S: Likewise. * sysdeps/i386/i686/multiarch/mempcpy.S: Likewise. * sysdeps/i386/i686/multiarch/mempcpy_chk.S: Likewise. * sysdeps/i386/i686/multiarch/memrchr.S: Likewise. * sysdeps/i386/i686/multiarch/memset.S: Likewise. * sysdeps/i386/i686/multiarch/memset_chk.S: Likewise. * sysdeps/i386/i686/multiarch/rawmemchr.S: Likewise. * sysdeps/i386/i686/multiarch/strcasecmp.S: Likewise. * sysdeps/i386/i686/multiarch/strcat.S: Likewise. * sysdeps/i386/i686/multiarch/strchr.S: Likewise. * sysdeps/i386/i686/multiarch/strcmp.S: Likewise. * sysdeps/i386/i686/multiarch/strcpy.S: Likewise. * sysdeps/i386/i686/multiarch/strcspn.S: Likewise. * sysdeps/i386/i686/multiarch/strlen.S: Likewise. * sysdeps/i386/i686/multiarch/strncase.S: Likewise. * sysdeps/i386/i686/multiarch/strnlen.S: Likewise. * sysdeps/i386/i686/multiarch/strrchr.S: Likewise. * sysdeps/i386/i686/multiarch/strspn.S: Likewise. * sysdeps/i386/i686/multiarch/wcschr.S: Likewise. * sysdeps/i386/i686/multiarch/wcscmp.S: Likewise. * sysdeps/i386/i686/multiarch/wcscpy.S: Likewise. * sysdeps/i386/i686/multiarch/wcslen.S: Likewise. * sysdeps/i386/i686/multiarch/wcsrchr.S: Likewise. * sysdeps/i386/i686/multiarch/wmemcmp.S: Likewise.
2015-08-03Update x86_64 multiarch functions for <cpu-features.h>H.J. Lu39-233/+246
This patch updates x86_64 multiarch functions to use the newly defined HAS_CPU_FEATURE, HAS_ARCH_FEATURE and LOAD_RTLD_GLOBAL_RO_RDX from <cpu-features.h>. * sysdeps/x86_64/fpu/multiarch/e_asin.c: Replace HAS_XXX with HAS_CPU_FEATURE/HAS_ARCH_FEATURE (XXX). * sysdeps/x86_64/fpu/multiarch/e_atan2.c: Likewise. * sysdeps/x86_64/fpu/multiarch/e_exp.c: Likewise. * sysdeps/x86_64/fpu/multiarch/e_log.c: Likewise. * sysdeps/x86_64/fpu/multiarch/e_pow.c: Likewise. * sysdeps/x86_64/fpu/multiarch/s_atan.c: Likewise. * sysdeps/x86_64/fpu/multiarch/s_fma.c: Likewise. * sysdeps/x86_64/fpu/multiarch/s_fmaf.c: Likewise. * sysdeps/x86_64/fpu/multiarch/s_sin.c: Likewise. * sysdeps/x86_64/fpu/multiarch/s_tan.c: Likewise. * sysdeps/x86_64/fpu/multiarch/s_ceil.S: Use LOAD_RTLD_GLOBAL_RO_RDX and HAS_CPU_FEATURE (SSE4_1). * sysdeps/x86_64/fpu/multiarch/s_ceilf.S: Likewise. * sysdeps/x86_64/fpu/multiarch/s_floor.S: Likewise. * sysdeps/x86_64/fpu/multiarch/s_floorf.S: Likewise. * sysdeps/x86_64/fpu/multiarch/s_nearbyint.S : Likewise. * sysdeps/x86_64/fpu/multiarch/s_nearbyintf.S: Likewise. * sysdeps/x86_64/fpu/multiarch/s_rintf.S: Likewise. * sysdeps/x86_64/fpu/multiarch/s_rintf.S : Likewise. * sysdeps/x86_64/multiarch/ifunc-impl-list.c: Likewise. * sysdeps/x86_64/multiarch/sched_cpucount.c: Likewise. * sysdeps/x86_64/multiarch/strstr.c: Likewise. * sysdeps/x86_64/multiarch/memmove.c: Likewise. * sysdeps/x86_64/multiarch/memmove_chk.c: Likewise. * sysdeps/x86_64/multiarch/test-multiarch.c: Likewise. * sysdeps/x86_64/multiarch/memcmp.S: Remove __init_cpu_features call. Add LOAD_RTLD_GLOBAL_RO_RDX. Replace HAS_XXX with HAS_CPU_FEATURE/HAS_ARCH_FEATURE (XXX). * sysdeps/x86_64/multiarch/memcpy.S: Likewise. * sysdeps/x86_64/multiarch/memcpy_chk.S: Likewise. * sysdeps/x86_64/multiarch/mempcpy.S: Likewise. * sysdeps/x86_64/multiarch/mempcpy_chk.S: Likewise. * sysdeps/x86_64/multiarch/memset.S: Likewise. * sysdeps/x86_64/multiarch/memset_chk.S: Likewise. * sysdeps/x86_64/multiarch/strcat.S: Likewise. * sysdeps/x86_64/multiarch/strchr.S: Likewise. * sysdeps/x86_64/multiarch/strcmp.S: Likewise. * sysdeps/x86_64/multiarch/strcpy.S: Likewise. * sysdeps/x86_64/multiarch/strcspn.S: Likewise. * sysdeps/x86_64/multiarch/strspn.S: Likewise. * sysdeps/x86_64/multiarch/wcscpy.S: Likewise. * sysdeps/x86_64/multiarch/wmemcmp.S: Likewise.
2015-08-03Add _dl_x86_cpu_features to rtld_global in ld.soH.J. Lu27-370/+545
This patch adds _dl_x86_cpu_features to rtld_global in x86 ld.so and initializes it early before __libc_start_main is called so that cpu_features is always available when it is used and we can avoid calling __init_cpu_features in IFUNC selectors. * sysdeps/i386/dl-machine.h: Include <cpu-features.c>. (dl_platform_init): Call init_cpu_features. * sysdeps/i386/dl-procinfo.c (_dl_x86_cpu_features): New. * sysdeps/i386/i686/cacheinfo.c (DISABLE_PREFERRED_MEMORY_INSTRUCTION): Removed. * sysdeps/i386/i686/multiarch/Makefile (aux): Remove init-arch. * sysdeps/i386/i686/multiarch/Versions: Removed. * sysdeps/i386/i686/multiarch/ifunc-defines.sym (KIND_OFFSET): Removed. * sysdeps/i386/ldsodefs.h: Include <cpu-features.h>. * sysdeps/unix/sysv/linux/x86/Makefile (libpthread-sysdep_routines): Remove init-arch. * sysdeps/unix/sysv/linux/x86_64/dl-procinfo.c: Include <sysdeps/x86_64/dl-procinfo.c> instead of sysdeps/generic/dl-procinfo.c>. * sysdeps/x86/Makefile [$(subdir) == csu] (gen-as-const-headers): Add cpu-features-offsets.sym and rtld-global-offsets.sym. [$(subdir) == elf] (sysdep-dl-routines): Add dl-get-cpu-features. [$(subdir) == elf] (sysdep-rtld-routines): Likewise. [$(subdir) == elf] (sysdep_routines): Likewise. [$(subdir) == elf] (elide-routines.os): Likewise. [$(subdir) == elf] (tests): Add tst-get-cpu-features. [$(subdir) == elf] (tests-static): Add tst-get-cpu-features-static. * sysdeps/x86/Versions: New file. * sysdeps/x86/cpu-features-offsets.sym: Likewise. * sysdeps/x86/cpu-features.c: Likewise. * sysdeps/x86/cpu-features.h: Likewise. * sysdeps/x86/dl-get-cpu-features.c: Likewise. * sysdeps/x86/libc-start.c: Likewise. * sysdeps/x86/rtld-global-offsets.sym: Likewise. * sysdeps/x86/tst-get-cpu-features-static.c: Likewise. * sysdeps/x86/tst-get-cpu-features.c: Likewise. * sysdeps/x86_64/dl-procinfo.c: Likewise. * sysdeps/x86_64/cacheinfo.c (__cpuid_count): Removed. Assume USE_MULTIARCH is defined and don't check it. (is_intel): Replace __cpu_features with GLRO(dl_x86_cpu_features). (is_amd): Likewise. (max_cpuid): Likewise. (intel_check_word): Likewise. (__cache_sysconf): Don't call __init_cpu_features. (__x86_preferred_memory_instruction): Removed. (init_cacheinfo): Don't call __init_cpu_features. Replace __cpu_features with GLRO(dl_x86_cpu_features). * sysdeps/x86_64/dl-machine.h: <cpu-features.c>. (dl_platform_init): Call init_cpu_features. * sysdeps/x86_64/ldsodefs.h: Include <cpu-features.h>. * sysdeps/x86_64/multiarch/Makefile (aux): Remove init-arch. * sysdeps/x86_64/multiarch/Versions: Removed. * sysdeps/x86_64/multiarch/cacheinfo.c: Likewise. * sysdeps/x86_64/multiarch/init-arch.c: Likewise. * sysdeps/x86_64/multiarch/ifunc-defines.sym (KIND_OFFSET): Removed. * sysdeps/x86_64/multiarch/init-arch.h: Rewrite.
2015-08-02Improve bndmov encoding with zero displacementH.J. Lu1-0/+8
If x86-64 assembler doesn't support MPX, we encode bndmov instruction by hand. When displacement is zero, assembler generates shorter encoding. This patch improves bndmov encoding with zero displacement so that ld.so is identical when using assemblers with and without MPX support. * sysdeps/x86_64/dl-trampoline.S (_dl_runtime_resolve): Improve bndmov encoding with zero displacement.
2015-08-02Preserve bound registers for pointer pass/returnIgor Zamyatin7-20/+92
We need to save/restore bound registers and add a BND prefix before branches in _dl_runtime_profile so that bound registers for pointer pass and return are preserved when LD_AUDIT is used. [BZ #18134] * sysdeps/i386/configure.ac: Set HAVE_MPX_SUPPORT. * sysdeps/i386/configure: Regenerated. * sysdeps/i386/dl-trampoline.S (PRESERVE_BND_REGS_PREFIX): New. (_dl_runtime_profile): Save and restore Intel MPX return bound registers when calling _dl_call_pltexit. Add PRESERVE_BND_REGS_PREFIX before return. * sysdeps/i386/link-defines.sym (LRV_BND0_OFFSET): New. (LRV_BND1_OFFSET): Likewise. * sysdeps/x86/bits/link.h (La_i86_retval): Add lrv_bnd0 and lrv_bnd1. * sysdeps/x86_64/dl-trampoline.S (_dl_runtime_profile): Fix typo in bndmov encoding. * sysdeps/x86_64/dl-trampoline.h: Properly save and restore Intel MPX bound registers. Add PRESERVE_BND_REGS_PREFIX before branch instructions to preserve bounds.
2015-08-02Preserve bound registers in _dl_runtime_resolveH.J. Lu1-0/+8
We need to add a BND prefix before indirect branch at the end of _dl_runtime_resolve to preserve bound registers. [BZ #18134] * sysdeps/x86_64/dl-trampoline.S (PRESERVE_BND_REGS_PREFIX): New. (_dl_runtime_resolve): Add a BND prefix before indirect branch.
2015-08-02Add and use sysdeps/i386/link-defines.symH.J. Lu3-15/+43
Define macros for fields in La_i86_regs and La_i86_retval and use them in dl-trampoline.S, instead of hardcoded values. * sysdeps/i386/Makefile (gen-as-const-headers)[elf]: Add link-defines.sym. * sysdeps/i386/dl-trampoline.S: Include <link-defines.h>. (_dl_runtime_profile): Use LONG_DOUBLE_SIZE, LRV_SIZE, LRV_EAX_OFFSET, LRV_EDX_OFFSET, LRV_ST0_OFFSET, LRV_ST1_OFFSET and LR_SIZE. * sysdeps/i386/link-defines.sym: New file.
2015-08-02Add a testcase for i386 LD_AUDITH.J. Lu5-0/+287
This patch adds a testcase for i386 LD_AUDIT to check function return and parameters passed in registers. * sysdeps/i386/Makefile (tests)[elf]: Add tst-audit3. (modules-names): Add tst-auditmod3a tst-auditmod3b. ($(objpfx)tst-audit3): New rule. ($(objpfx)tst-audit3.out): Likewise. * sysdeps/i386/tst-audit3.c: New file. * sysdeps/i386/tst-audit3.h: Likewise. * sysdeps/i386/tst-auditmod3a.c: Likewise. * sysdeps/i386/tst-auditmod3b.c: Likewise.
2015-08-01Replace __attribute__((visibility("protected")))hjl/pr17711/2.21H.J. Lu3-3/+21
With copy relocation, address of protected data defined in the shared library may be external. Compiler shouldn't asssume protected data will be local. But due to https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65248 __attribute__((visibility("protected"))) doesn't work correctly, we need to use asm (".protected xxx") instead. Cherry-pick from master: e0ed2fb40a0e29c43cf60addc74741dab15f2e05 * elf/ifuncdep2.c (global): Replace __attribute__((visibility("protected"))) with asm (".protected global"). * elf/ifuncmod1.c (global): Likewise. * elf/ifuncmod5.c (global): Likewise.
2015-08-01Add a testcase for copy reloc against protected dataH.J. Lu9-0/+744
Linkers in some versions of binutils 2.25 and 2.26 don't support protected data symbol with error messsage like: /usr/bin/ld: copy reloc against protected `bar' is invalid /usr/bin/ld: failed to set dynamic section sizes: Bad value We check if linker supports copy reloc against protected data symbol to avoid running the test if linker is broken. Cherry-pick from master: 83569fb894050db7430047da2219ca50c68f882a [BZ #17711] * config.make.in (have-protected-data): New. * configure.ac: Check linker support for protected data symbol. * configure: Regenerated. * elf/Makefile (modules-names): Add tst-protected1moda and tst-protected1modb if $(have-protected-data) is yes. (tests): Add tst-protected1a and tst-protected1b if $(have-protected-data) is yes. ($(objpfx)tst-protected1a): New. ($(objpfx)tst-protected1b): Likewise. (tst-protected1modb.so-no-z-defs): Likewise. * elf/tst-protected1a.c: New file. * elf/tst-protected1b.c: Likewise. * elf/tst-protected1mod.h: Likewise. * elf/tst-protected1moda.c: Likewise. * elf/tst-protected1modb.c: Likewise.
2015-08-01Add ELF_RTYPE_CLASS_EXTERN_PROTECTED_DATA to x86H.J. Lu6-6/+91
With copy relocation, address of protected data defined in the shared library may be external. When there is a relocation against the protected data symbol within the shared library, we need to check if we should skip the definition in the executable copied from the protected data. This patch adds ELF_RTYPE_CLASS_EXTERN_PROTECTED_DATA and defines it for x86. If ELF_RTYPE_CLASS_EXTERN_PROTECTED_DATA isn't 0, do_lookup_x will skip the data definition in the executable from copy reloc. Cherry-pick from master: 62da1e3b00b51383ffa7efc89d8addda0502e107 [BZ #17711] * elf/dl-lookup.c (do_lookup_x): When UNDEF_MAP is NULL, which indicates it is called from do_lookup_x on relocation against protected data, skip the data definion in the executable from copy reloc. (_dl_lookup_symbol_x): Pass ELF_RTYPE_CLASS_EXTERN_PROTECTED_DATA, instead of ELF_RTYPE_CLASS_PLT, to do_lookup_x for EXTERN_PROTECTED_DATA relocation against STT_OBJECT symbol. * sysdeps/generic/ldsodefs.h * (ELF_RTYPE_CLASS_EXTERN_PROTECTED_DATA): New. Defined to 4 if DL_EXTERN_PROTECTED_DATA is defined, otherwise to 0. * sysdeps/i386/dl-lookupcfg.h (DL_EXTERN_PROTECTED_DATA): New. * sysdeps/i386/dl-machine.h (elf_machine_type_class): Set class to ELF_RTYPE_CLASS_EXTERN_PROTECTED_DATA for R_386_GLOB_DAT. * sysdeps/x86_64/dl-lookupcfg.h (DL_EXTERN_PROTECTED_DATA): New. * sysdeps/x86_64/dl-machine.h (elf_machine_type_class): Set class to ELF_RTYPE_CLASS_EXTERN_PROTECTED_DATA for R_X86_64_GLOB_DAT.
2015-07-28ia64: atomic.h: fix atomic_exchange_and_add 64bit handlingMike Frysinger2-3/+6
Way back in 2005 the atomic_exchange_and_add function was cleaned up to avoid the explicit size checking and instead let gcc handle things itself. Unfortunately that change ended up leaving beyond a cast to int, even when the incoming value was a long. This has flown under the radar for a long time due to the function not being heavily used in the tree (especially as a full 64bit field), but a recent change to semaphores made some nptl tests fail reliably. This is due to the code packing two 32bit values into one 64bit variable (where the high 32bits contained the number of waiters), and then the whole variable being atomically updated between threads. On ia64, that meant we never atomically updated the count, so sometimes the sem_post would not wake up the waiters. (cherry picked from commit cf31a2c79957936b60de34ea1e718e892baf669c)
2015-07-20Fix BZ #17269 -- _IO_wstr_overflow integer overflowPaul Pluzhnikov3-2/+14
(cherry picked from commit bdf1ff052a8e23d637f2c838fa5642d78fcedc33)
2015-07-20Fix read past end of pattern in fnmatch (bug 18032)Andreas Schwab4-7/+15
(cherry picked from commit 4a28f4d55a6cc33474c0792fe93b5942d81bf185)
2015-07-20sparc: fix sigaction for 32bit builds [BZ #18694]Mike Frysinger3-1/+16
Commit a059d359d86130b5fa74e04a978c8523a0293f77 changed the sigaction struct to pass conform tests, but it ended up also changing the ABI for 32 bit builds. For 64 bit builds, changing the long to two ints works, but for 32 bit builds, it inserts 4 extra bytes. This leads to many packages randomly failing like bash that spews things like: configure: line 471: wait_for: No record of process 0 Bracket the new member by a wordsize check to fix the ABI for 32bit. (cherry picked from commit 7fde904c73c57faea48c9679bbdc0932d81b3a2f)
2015-04-22CVE-2015-1781: resolv/nss_dns/dns-host.c buffer overflow [BZ#18287]Arjun Shankar3-2/+16
(cherry picked from commit 2959eda9272a033863c271aff62095abd01bd4e3)
2015-02-10Fix __memcpy_chk on non-SSE2 CPUsEvangelos Foutras3-2/+14
In commit 8b4416d, the 1: jump label in __mempcpy_chk was accidentally moved. This resulted in failures of mempcpy on CPU without SSE2. (cherry picked from commit 132a1328eccd20621b77f7810eebbeec0a1af187)
2015-02-06NEWS: Also mention CVE-2015-1473Florian Weimer1-4/+5
2015-02-06Fix missing ChangeLog attribution.Carlos O'Donell1-0/+1
2015-02-06Update version.h and include/features.h for 2.21 releaseglibc-2.21Carlos O'Donell3-3/+7
2015-02-06hppa: Sync with pthread.h.Carlos O'Donell2-1/+1150
This reverts part of the previous commit to refactor pthread.h. The refactoring must be done by having pthread.h include arch bits headers, not the other way around. Then hppa provides the arch bits header. For now we synchronzie again with pthread.h and include the entire contents in the hppa copy.
2015-02-06CVE-2015-1472: wscanf allocates too little memoryPaul Pluzhnikov4-15/+62
BZ #16618 Under certain conditions wscanf can allocate too little memory for the to-be-scanned arguments and overflow the allocated buffer. The implementation now correctly computes the required buffer size when using malloc. A regression test was added to tst-sscanf.
2015-02-05glibc 2.21 pre-release update.Carlos O'Donell40-46505/+67618
Update all translations. Update contributions in the manual. Update installation notes with information about newest working tools. Reconfigure using exactly autoconf 2.69. Regenerate INSTALL.
2015-02-05hppa: Remove warnings and fix conformance errors.Carlos O'Donell14-1212/+151
(1) Fix warnings. This is a bulk update to fix all the warnings that were causing build failures with -Werror on hppa. The most egregious problems are in dl-fptr.c which needs to be entirely rewritten, thus I've used -Wno-error for that. (2) Fix conformance errors. The sysdep.c file had __syscall_error and syscall in one file which caused conformance issues by including syscall when __syscall_error was linked to. The fix is obviously to split the file and use syscall.c to implement syscall.
2015-02-05Function name typo error in non-PIC case, fixed in this patch.Chung-Lin Tang2-1/+6
2015-01-31Fix two bugs in sparc atomics.David S. Miller2-7/+14
* sysdeps/sparc/sparc32/bits/atomic.h (__sparc32_atomic_do_unlock24): Put the memory barrier before the unlock not after it. (__v9_compare_and_exchange_val_32_acq): Use unions to avoid getting volatile register usage warnings from the compiler.
2015-01-31Fix sparc semaphore implementation after recent changes.David S. Miller18-703/+692
* sysdeps/sparc/nptl/sem_init.c: Delete. * sysdeps/sparc/nptl/sem_post.c: Delete. * sysdeps/sparc/nptl/sem_timedwait.c: Delete. * sysdeps/sparc/nptl/sem_wait.c: Delete. * sysdeps/sparc/sparc32/sem_init.c: New file. * sysdeps/sparc/sparc32/sem_waitcommon.c: New file. * sysdeps/sparc/sparc32/sem_open.c: Generic nptl version with padding explicitly initialized. * sysdeps/sparc/sparc32/sem_post.c: Generic nptl version using padding for in-semaphore spinlock. * sysdeps/sparc/sparc32/sem_wait.c: Likewise. * sysdeps/sparc/sparc32/sem_trywait.c: Delete. * sysdeps/sparc/sparc32/sem_timedwait.c: Delete. * sysdeps/sparc/sparc32/sparcv9/sem_init.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_open.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_post.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_waitcommon.c: New file. * sysdeps/sparc/sparc32/sparcv9/sem_wait.c: Redirect to nptl version. * sysdeps/sparc/sparc32/sparcv9/sem_timedwait.c: Delete. * sysdeps/sparc/sparc32/sparcv9/sem_trywait.c: Delete.
2015-01-30Use AVX unaligned memcpy only if AVX2 is availableH.J. Lu10-10/+37
memcpy with unaligned 256-bit AVX register loads/stores are slow on older processorsl like Sandy Bridge. This patch adds bit_AVX_Fast_Unaligned_Load and sets it only when AVX2 is available. [BZ #17801] * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features): Set the bit_AVX_Fast_Unaligned_Load bit for AVX2. * sysdeps/x86_64/multiarch/init-arch.h (bit_AVX_Fast_Unaligned_Load): New. (index_AVX_Fast_Unaligned_Load): Likewise. (HAS_AVX_FAST_UNALIGNED_LOAD): Likewise. * sysdeps/x86_64/multiarch/memcpy.S (__new_memcpy): Check the bit_AVX_Fast_Unaligned_Load bit instead of the bit_AVX_Usable bit. * sysdeps/x86_64/multiarch/memcpy_chk.S (__memcpy_chk): Likewise. * sysdeps/x86_64/multiarch/mempcpy.S (__mempcpy): Likewise. * sysdeps/x86_64/multiarch/mempcpy_chk.S (__mempcpy_chk): Likewise. * sysdeps/x86_64/multiarch/memmove.c (__libc_memmove): Replace HAS_AVX with HAS_AVX_FAST_UNALIGNED_LOAD. * sysdeps/x86_64/multiarch/memmove_chk.c (__memmove_chk): Likewise.
2015-01-29Include <signal.h> in sysdeps/nptl/allocrtsig.cAndreas Schwab2-0/+5
Architectures which don't use hp-timing-common.h don't include <signal.h> via <sys/param.h>.
2015-01-29Fix up ChangeLog formattingSiddhesh Poyarekar1-12/+12
2015-01-29Initialize nscd stats data [BZ #17892]Siddhesh Poyarekar3-1/+8
The padding bytes in the statsdata struct are not initialized, due to which valgrind throws a warning: ==11384== Memcheck, a memory error detector ==11384== Copyright (C) 2002-2012, and GNU GPL'd, by Julian Seward et al. ==11384== Using Valgrind-3.8.1 and LibVEX; rerun with -h for copyright info ==11384== Command: nscd -d ==11384== Fri 25 Apr 2014 10:34:53 AM CEST - 11384: handle_request: request received (Version = 2) from PID 11396 Fri 25 Apr 2014 10:34:53 AM CEST - 11384: GETSTAT ==11384== Thread 6: ==11384== Syscall param socketcall.sendto(msg) points to uninitialised byte(s) ==11384== at 0x4E4ACDC: send (in /lib64/libpthread-2.12.so) ==11384== by 0x11AF6B: send_stats (in /usr/sbin/nscd) ==11384== by 0x112F75: nscd_run_worker (in /usr/sbin/nscd) ==11384== by 0x4E439D0: start_thread (in /lib64/libpthread-2.12.so) ==11384== by 0x599AB6C: clone (in /lib64/libc-2.12.so) ==11384== Address 0x15708395 is on thread 6's stack Fix the warning by initializing the structure.
2015-01-28Clarify math/README.libm-test. Add "How to read the test output."Martin Sebor2-14/+71
2015-01-28tilegx32: set __HAVE_64B_ATOMICS to 0Chris Metcalf2-1/+14
This is because of alignment issues in the sem_t support. tilegx32 does in fact support 64-bit atomics and we will need to revisit this after the 2.21 freeze.
2015-01-28Disable 64-bit atomics for MIPS n32.Joseph Myers2-1/+6
This patch disables use of 64-bit atomics for MIPS n32 to fix the problems with unaligned semaphores. Before 64-bit atomics are used for anything for which such alignment issues do not arise, and before the addition of any new ILP32 ports with 64-bit semaphores for which the ABI can be set to have the greater alignment (AARCH64?), a better approach will need to be established that allows architectures to declare their 64-bit atomics availability accurately, without doing so causing inappropriate use of such atomics on unaligned semaphores. Tested for MIPS n32 that this fixes the nptl/tst-sem3 failure. * sysdeps/mips/bits/atomic.h [_MIPS_SIM == _ABIN32] (__HAVE_64B_ATOMICS): Define to 0.
2015-01-28powerpc: Fix fesetexceptflag [BZ#17885]Adhemerval Zanella3-2/+6
This patch fixes a bug introduced by 18f2945ae9216cfc, where it optimizes the FPSCR set by just issuing a mtfs instruction if new flag is different from older one. The issue is a typo, where the new flag should the the new value, instead of the old one. It fixes BZ#17885.
2015-01-28powerpc: Fix fsqrt build in libm [BZ#16576]Adhemerval Zanella7-111/+50
Some powerpc64 processors (e5500 core for instance) does not provide the fsqrt instruction, however current check to use in math_private.h is __WORDSIZE and _ARCH_PWR4 (ISA 2.02). This is patch change it to use the compiler flag _ARCH_PPCSQ (which is the same condition GCC uses to decide whether to generate fsqrt instruction). It fixes BZ#16576.
2015-01-27iconv: Suppress array out of bounds warning.Andreas Krebbel2-1/+12
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