4 files changed, 51 insertions, 16 deletions

diff --git a/sysdeps/mips/bits/fenv.h b/sysdeps/mips/bits/fenv.h
index 37d0a9e..767595d 100644
--- a/sysdeps/mips/bits/fenv.h
+++ b/sysdeps/mips/bits/fenv.h
@@ -20,28 +20,30 @@
 #endif
 
 
+#ifdef __mips_hard_float
+
 /* Define bits representing the exception.  We use the bit positions
    of the appropriate bits in the FPU control word.  */
 enum
   {
     FE_INEXACT =
-#define FE_INEXACT	0x04
+# define FE_INEXACT	0x04
       FE_INEXACT,
     FE_UNDERFLOW =
-#define FE_UNDERFLOW	0x08
+# define FE_UNDERFLOW	0x08
       FE_UNDERFLOW,
     FE_OVERFLOW =
-#define FE_OVERFLOW	0x10
+# define FE_OVERFLOW	0x10
       FE_OVERFLOW,
     FE_DIVBYZERO =
-#define FE_DIVBYZERO	0x20
+# define FE_DIVBYZERO	0x20
       FE_DIVBYZERO,
     FE_INVALID =
-#define FE_INVALID	0x40
+# define FE_INVALID	0x40
       FE_INVALID,
   };
 
-#define FE_ALL_EXCEPT \
+# define FE_ALL_EXCEPT \
 	(FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
 
 /* The MIPS FPU supports all of the four defined rounding modes.  We
@@ -50,19 +52,37 @@ enum
 enum
   {
     FE_TONEAREST =
-#define FE_TONEAREST	0x0
+# define FE_TONEAREST	0x0
       FE_TONEAREST,
     FE_TOWARDZERO =
-#define FE_TOWARDZERO	0x1
+# define FE_TOWARDZERO	0x1
       FE_TOWARDZERO,
     FE_UPWARD =
-#define FE_UPWARD	0x2
+# define FE_UPWARD	0x2
       FE_UPWARD,
     FE_DOWNWARD =
-#define FE_DOWNWARD	0x3
+# define FE_DOWNWARD	0x3
       FE_DOWNWARD
   };
 
+#else
+
+/* In the soft-float case, only rounding to nearest is supported, with
+   no exceptions.  */
+
+enum
+  {
+    __FE_UNDEFINED = -1,
+
+    FE_TONEAREST =
+# define FE_TONEAREST	0x0
+      FE_TONEAREST
+  };
+
+# define FE_ALL_EXCEPT 0
+
+#endif
+
 
 /* Type representing exception flags.  */
 typedef unsigned short int fexcept_t;
@@ -79,7 +99,7 @@ fenv_t;
 /* If the default argument is used we use this value.  */
 #define FE_DFL_ENV	((const fenv_t *) -1)
 
-#ifdef __USE_GNU
+#if defined __USE_GNU && defined __mips_hard_float
 /* Floating-point environment where none of the exception is masked.  */
 # define FE_NOMASK_ENV  ((const fenv_t *) -2)
 #endif
diff --git a/sysdeps/mips/mips64/sfp-machine.h b/sysdeps/mips/mips64/sfp-machine.h
index 35cc4dd..c769ee8 100644
--- a/sysdeps/mips/mips64/sfp-machine.h
+++ b/sysdeps/mips/mips64/sfp-machine.h
@@ -74,6 +74,10 @@
   } while (0)
 #endif
 
+#define _FP_TININESS_AFTER_ROUNDING 1
+
+#ifdef __mips_hard_float
+
 #define _FP_DECL_EX		fpu_control_t _fcw
 
 #define FP_ROUNDMODE		(_fcw & 0x3)
@@ -89,9 +93,6 @@
 #define FP_EX_DIVZERO		FE_DIVBYZERO
 #define FP_EX_INEXACT		FE_INEXACT
 
-#define _FP_TININESS_AFTER_ROUNDING 1
-
-#ifdef __mips_hard_float
 #define FP_INIT_ROUNDMODE			\
 do {						\
   _FPU_GETCW (_fcw);				\
@@ -103,6 +104,4 @@ do {						\
     _FPU_SETCW (_fcw | _fex | (_fex << 10));	\
 } while (0)
 #define FP_TRAPPING_EXCEPTIONS ((_fcw >> 5) & 0x7c)
-#else
-#define FP_INIT_ROUNDMODE	_fcw = FP_RND_NEAREST
 #endif
diff --git a/sysdeps/mips/nofpu/fesetenv.c b/sysdeps/mips/nofpu/fesetenv.c
new file mode 100644
index 0000000..4667e76
--- /dev/null
+++ b/sysdeps/mips/nofpu/fesetenv.c
@@ -0,0 +1,8 @@
+/* MIPS bits/fenv.h used to define exception macros for soft-float
+   despite that not supporting exceptions.  Ensure use of the old
+   FE_NOMASK_ENV value still produces errors (see bug 17088).  */
+#include <fenv.h>
+#undef FE_ALL_EXCEPT
+#define FE_ALL_EXCEPT 0x7c
+#define FE_NOMASK_ENV ((const fenv_t *) -2)
+#include <math/fesetenv.c>
diff --git a/sysdeps/mips/nofpu/feupdateenv.c b/sysdeps/mips/nofpu/feupdateenv.c
new file mode 100644
index 0000000..9a7e316
--- /dev/null
+++ b/sysdeps/mips/nofpu/feupdateenv.c
@@ -0,0 +1,8 @@
+/* MIPS bits/fenv.h used to define exception macros for soft-float
+   despite that not supporting exceptions.  Ensure use of the old
+   FE_NOMASK_ENV value still produces errors (see bug 17088).  */
+#include <fenv.h>
+#undef FE_ALL_EXCEPT
+#define FE_ALL_EXCEPT 0x7c
+#define FE_NOMASK_ENV ((const fenv_t *) -2)
+#include <math/feupdateenv.c>