diff options
Diffstat (limited to 'sysdeps/x86/cpu-features.c')
| -rw-r--r-- | sysdeps/x86/cpu-features.c | 80 |
1 files changed, 42 insertions, 38 deletions
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c index 218ff2b..1787716 100644 --- a/sysdeps/x86/cpu-features.c +++ b/sysdeps/x86/cpu-features.c @@ -75,13 +75,14 @@ init_cpu_features (struct cpu_features *cpu_features) case 0x1c: case 0x26: /* BSF is slow on Atom. */ - cpu_features->feature[index_Slow_BSF] |= bit_Slow_BSF; + cpu_features->feature[index_arch_Slow_BSF] + |= bit_arch_Slow_BSF; break; case 0x57: /* Knights Landing. Enable Silvermont optimizations. */ - cpu_features->feature[index_Prefer_No_VZEROUPPER] - |= bit_Prefer_No_VZEROUPPER; + cpu_features->feature[index_arch_Prefer_No_VZEROUPPER] + |= bit_arch_Prefer_No_VZEROUPPER; case 0x37: case 0x4a: @@ -90,22 +91,22 @@ init_cpu_features (struct cpu_features *cpu_features) case 0x5d: /* Unaligned load versions are faster than SSSE3 on Silvermont. */ -#if index_Fast_Unaligned_Load != index_Prefer_PMINUB_for_stringop -# error index_Fast_Unaligned_Load != index_Prefer_PMINUB_for_stringop +#if index_arch_Fast_Unaligned_Load != index_arch_Prefer_PMINUB_for_stringop +# error index_arch_Fast_Unaligned_Load != index_arch_Prefer_PMINUB_for_stringop #endif -#if index_Fast_Unaligned_Load != index_Slow_SSE4_2 -# error index_Fast_Unaligned_Load != index_Slow_SSE4_2 +#if index_arch_Fast_Unaligned_Load != index_arch_Slow_SSE4_2 +# error index_arch_Fast_Unaligned_Load != index_arch_Slow_SSE4_2 #endif - cpu_features->feature[index_Fast_Unaligned_Load] - |= (bit_Fast_Unaligned_Load - | bit_Prefer_PMINUB_for_stringop - | bit_Slow_SSE4_2); + cpu_features->feature[index_arch_Fast_Unaligned_Load] + |= (bit_arch_Fast_Unaligned_Load + | bit_arch_Prefer_PMINUB_for_stringop + | bit_arch_Slow_SSE4_2); break; default: /* Unknown family 0x06 processors. Assuming this is one of Core i3/i5/i7 processors if AVX is available. */ - if ((ecx & bit_AVX) == 0) + if ((ecx & bit_cpu_AVX) == 0) break; case 0x1a: @@ -117,20 +118,20 @@ init_cpu_features (struct cpu_features *cpu_features) case 0x2f: /* Rep string instructions, copy backward, unaligned loads and pminub are fast on Intel Core i3, i5 and i7. */ -#if index_Fast_Rep_String != index_Fast_Copy_Backward -# error index_Fast_Rep_String != index_Fast_Copy_Backward +#if index_arch_Fast_Rep_String != index_arch_Fast_Copy_Backward +# error index_arch_Fast_Rep_String != index_arch_Fast_Copy_Backward #endif -#if index_Fast_Rep_String != index_Fast_Unaligned_Load -# error index_Fast_Rep_String != index_Fast_Unaligned_Load +#if index_arch_Fast_Rep_String != index_arch_Fast_Unaligned_Load +# error index_arch_Fast_Rep_String != index_arch_Fast_Unaligned_Load #endif -#if index_Fast_Rep_String != index_Prefer_PMINUB_for_stringop -# error index_Fast_Rep_String != index_Prefer_PMINUB_for_stringop +#if index_arch_Fast_Rep_String != index_arch_Prefer_PMINUB_for_stringop +# error index_arch_Fast_Rep_String != index_arch_Prefer_PMINUB_for_stringop #endif - cpu_features->feature[index_Fast_Rep_String] - |= (bit_Fast_Rep_String - | bit_Fast_Copy_Backward - | bit_Fast_Unaligned_Load - | bit_Prefer_PMINUB_for_stringop); + cpu_features->feature[index_arch_Fast_Rep_String] + |= (bit_arch_Fast_Rep_String + | bit_arch_Fast_Copy_Backward + | bit_arch_Fast_Unaligned_Load + | bit_arch_Prefer_PMINUB_for_stringop); break; } } @@ -159,8 +160,8 @@ init_cpu_features (struct cpu_features *cpu_features) { /* "Excavator" */ if (model >= 0x60 && model <= 0x7f) - cpu_features->feature[index_Fast_Unaligned_Load] - |= bit_Fast_Unaligned_Load; + cpu_features->feature[index_arch_Fast_Unaligned_Load] + |= bit_arch_Fast_Unaligned_Load; } } else @@ -168,11 +169,11 @@ init_cpu_features (struct cpu_features *cpu_features) /* Support i586 if CX8 is available. */ if (HAS_CPU_FEATURE (CX8)) - cpu_features->feature[index_I586] |= bit_I586; + cpu_features->feature[index_arch_I586] |= bit_arch_I586; /* Support i686 if CMOV is available. */ if (HAS_CPU_FEATURE (CMOV)) - cpu_features->feature[index_I686] |= bit_I686; + cpu_features->feature[index_arch_I686] |= bit_arch_I686; if (cpu_features->max_cpuid >= 7) __cpuid_count (7, 0, @@ -193,15 +194,16 @@ init_cpu_features (struct cpu_features *cpu_features) { /* Determine if AVX is usable. */ if (HAS_CPU_FEATURE (AVX)) - cpu_features->feature[index_AVX_Usable] |= bit_AVX_Usable; -#if index_AVX2_Usable != index_AVX_Fast_Unaligned_Load -# error index_AVX2_Usable != index_AVX_Fast_Unaligned_Load + cpu_features->feature[index_arch_AVX_Usable] + |= bit_arch_AVX_Usable; +#if index_arch_AVX2_Usable != index_arch_AVX_Fast_Unaligned_Load +# error index_arch_AVX2_Usable != index_arch_AVX_Fast_Unaligned_Load #endif /* Determine if AVX2 is usable. Unaligned load with 256-bit AVX registers are faster on processors with AVX2. */ if (HAS_CPU_FEATURE (AVX2)) - cpu_features->feature[index_AVX2_Usable] - |= bit_AVX2_Usable | bit_AVX_Fast_Unaligned_Load; + cpu_features->feature[index_arch_AVX2_Usable] + |= bit_arch_AVX2_Usable | bit_arch_AVX_Fast_Unaligned_Load; /* Check if OPMASK state, upper 256-bit of ZMM0-ZMM15 and ZMM16-ZMM31 state are enabled. */ if ((xcrlow & (bit_Opmask_state | bit_ZMM0_15_state @@ -211,20 +213,22 @@ init_cpu_features (struct cpu_features *cpu_features) /* Determine if AVX512F is usable. */ if (HAS_CPU_FEATURE (AVX512F)) { - cpu_features->feature[index_AVX512F_Usable] - |= bit_AVX512F_Usable; + cpu_features->feature[index_arch_AVX512F_Usable] + |= bit_arch_AVX512F_Usable; /* Determine if AVX512DQ is usable. */ if (HAS_CPU_FEATURE (AVX512DQ)) - cpu_features->feature[index_AVX512DQ_Usable] - |= bit_AVX512DQ_Usable; + cpu_features->feature[index_arch_AVX512DQ_Usable] + |= bit_arch_AVX512DQ_Usable; } } /* Determine if FMA is usable. */ if (HAS_CPU_FEATURE (FMA)) - cpu_features->feature[index_FMA_Usable] |= bit_FMA_Usable; + cpu_features->feature[index_arch_FMA_Usable] + |= bit_arch_FMA_Usable; /* Determine if FMA4 is usable. */ if (HAS_CPU_FEATURE (FMA4)) - cpu_features->feature[index_FMA4_Usable] |= bit_FMA4_Usable; + cpu_features->feature[index_arch_FMA4_Usable] + |= bit_arch_FMA4_Usable; } } |