diff options
Diffstat (limited to 'sysdeps/sparc/sparc64')
23 files changed, 7 insertions, 1085 deletions
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile index 6a9274b..47859f0 100644 --- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile +++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile @@ -1,16 +1,12 @@ ifeq ($(subdir),math) -libm-sysdep_routines += s_ceil-vis2 s_ceilf-vis2 \ - s_floor-vis2 s_floorf-vis2 ifeq ($(have-as-vis3),yes) -libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 s_ceilf-vis3 \ - s_ceil-vis3 m_finitef-vis3 m_finite-vis3 \ - s_floorf-vis3 s_floor-vis3 m_isinff-vis3 \ - m_isinf-vis3 m_isnanf-vis3 m_isnan-vis3 \ - s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 \ - s_rint-vis3 s_fminf-vis3 s_fmin-vis3 \ - s_fmaxf-vis3 s_fmax-vis3 s_fmaf-vis3 \ - s_fma-vis3 s_nearbyint-vis3 s_nearbyintf-vis3 \ - s_truncf-vis3 s_trunc-vis3 +libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 m_finitef-vis3 \ + m_finite-vis3 m_isinff-vis3 m_isinf-vis3 \ + m_isnanf-vis3 m_isnan-vis3 s_lrintf-vis3 \ + s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \ + s_fminf-vis3 s_fmin-vis3 s_fmaxf-vis3 \ + s_fmax-vis3 s_fmaf-vis3 s_fma-vis3 \ + s_nearbyint-vis3 s_nearbyintf-vis3 sysdep_routines += s_signbitf-vis3 s_signbit-vis3 s_finitef-vis3 \ s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \ s_isnanf-vis3 s_isnan-vis3 diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis2.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis2.S deleted file mode 100644 index fd1bf38..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis2.S +++ /dev/null @@ -1,57 +0,0 @@ -/* ceil function, sparc64 vis2 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* 'siam' (Set Interval Arithmetic Mode) is used to quickly override - the rounding mode during this routine. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value and, - with suitable 'siam' initiated rouding mode settings, round - the final result in the proper direction. */ - -#define TWO_FIFTYTWO 0x43300000 /* 2**52 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__ceil_vis2) - sethi %hi(TWO_FIFTYTWO), %o2 - fzero ZERO - sllx %o2, 32, %o2 - fnegd ZERO, SIGN_BIT - stx %o2, [%sp + STACK_BIAS + 128] - fabsd %f0, %f14 - ldd [%sp + STACK_BIAS + 128], %f16 - fcmpd %fcc3, %f14, %f16 - fmovduge %fcc3, ZERO, %f16 - fand %f0, SIGN_BIT, SIGN_BIT - for %f16, SIGN_BIT, %f16 - siam (1 << 2) | 2 - faddd %f0, %f16, %f18 - siam (1 << 2) | 0 - fsubd %f18, %f16, %f18 - siam (0 << 2) - retl - for %f18, SIGN_BIT, %f0 -END (__ceil_vis2) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis3.S deleted file mode 100644 index e6fa3f5..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil-vis3.S +++ /dev/null @@ -1,59 +0,0 @@ -/* ceil function, sparc64 vis3 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* 'siam' (Set Interval Arithmetic Mode) is used to quickly override - the rounding mode during this routine. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value and, - with suitable 'siam' initiated rouding mode settings, round - the final result in the proper direction. - - We also use VIS3 moves to avoid using the stack to transfer - values between float and integer registers. */ - -#define TWO_FIFTYTWO 0x43300000 /* 2**52 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__ceil_vis3) - sethi %hi(TWO_FIFTYTWO), %o2 - fzero ZERO - sllx %o2, 32, %o2 - fnegd ZERO, SIGN_BIT - movxtod %o2, %f16 - fabsd %f0, %f14 - fcmpd %fcc3, %f14, %f16 - fmovduge %fcc3, ZERO, %f16 - fand %f0, SIGN_BIT, SIGN_BIT - for %f16, SIGN_BIT, %f16 - siam (1 << 2) | 2 - faddd %f0, %f16, %f18 - siam (1 << 2) | 0 - fsubd %f18, %f16, %f18 - siam (0 << 2) - retl - for %f18, SIGN_BIT, %f0 -END (__ceil_vis3) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.S deleted file mode 100644 index e7822bc..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceil.S +++ /dev/null @@ -1,12 +0,0 @@ -#include <sparc-ifunc.h> - -SPARC_ASM_VIS3_VIS2_IFUNC(ceil) - -weak_alias (__ceil, ceil) - -# undef weak_alias -# define weak_alias(a, b) - -#define __ceil __ceil_generic - -#include "../s_ceil.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis2.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis2.S deleted file mode 100644 index fe57a52..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis2.S +++ /dev/null @@ -1,56 +0,0 @@ -/* Float ceil function, sparc64 vis2 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* 'siam' (Set Interval Arithmetic Mode) is used to quickly override - the rounding mode during this routine. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value and, - with suitable 'siam' initiated rouding mode settings, round - the final result in the proper direction. */ - -#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__ceilf_vis2) - sethi %hi(TWO_TWENTYTHREE), %o2 - fzeros ZERO - fnegs ZERO, SIGN_BIT - st %o2, [%sp + STACK_BIAS + 128] - fabss %f1, %f14 - ld [%sp + STACK_BIAS + 128], %f16 - fcmps %fcc3, %f14, %f16 - fmovsuge %fcc3, ZERO, %f16 - fands %f1, SIGN_BIT, SIGN_BIT - fors %f16, SIGN_BIT, %f16 - siam (1 << 2) | 2 - fadds %f1, %f16, %f5 - siam (1 << 2) | 0 - fsubs %f5, %f16, %f5 - siam (0 << 2) - retl - fors %f5, SIGN_BIT, %f0 -END (__ceilf_vis2) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S deleted file mode 100644 index 9a0f9c5..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf-vis3.S +++ /dev/null @@ -1,58 +0,0 @@ -/* Float ceil function, sparc64 vis3 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* 'siam' (Set Interval Arithmetic Mode) is used to quickly override - the rounding mode during this routine. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value and, - with suitable 'siam' initiated rouding mode settings, round - the final result in the proper direction. - - We also use VIS3 moves to avoid using the stack to transfer - values between float and integer registers. */ - -#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__ceilf_vis3) - sethi %hi(TWO_TWENTYTHREE), %o2 - fzeros ZERO - fnegs ZERO, SIGN_BIT - movwtos %o2, %f16 - fabss %f1, %f14 - fcmps %fcc3, %f14, %f16 - fmovsuge %fcc3, ZERO, %f16 - fands %f1, SIGN_BIT, SIGN_BIT - fors %f16, SIGN_BIT, %f16 - siam (1 << 2) | 2 - fadds %f1, %f16, %f5 - siam (1 << 2) | 0 - fsubs %f5, %f16, %f5 - siam (0 << 2) - retl - fors %f5, SIGN_BIT, %f0 -END (__ceilf_vis3) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.S deleted file mode 100644 index 1c72a57..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_ceilf.S +++ /dev/null @@ -1,12 +0,0 @@ -#include <sparc-ifunc.h> - -SPARC_ASM_VIS3_VIS2_IFUNC(ceilf) - -weak_alias (__ceilf, ceilf) - -# undef weak_alias -# define weak_alias(a, b) - -#define __ceilf __ceilf_generic - -#include "../s_ceilf.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis2.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis2.S deleted file mode 100644 index 84fda73..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis2.S +++ /dev/null @@ -1,57 +0,0 @@ -/* floor function, sparc64 vis2 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* 'siam' (Set Interval Arithmetic Mode) is used to quickly override - the rounding mode during this routine. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value and, - with suitable 'siam' initiated rouding mode settings, round - the final result in the proper direction. */ - -#define TWO_FIFTYTWO 0x43300000 /* 2**52 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__floor_vis2) - sethi %hi(TWO_FIFTYTWO), %o2 - fzero ZERO - sllx %o2, 32, %o2 - fnegd ZERO, SIGN_BIT - stx %o2, [%sp + STACK_BIAS + 128] - fabsd %f0, %f14 - ldd [%sp + STACK_BIAS + 128], %f16 - fcmpd %fcc3, %f14, %f16 - fmovduge %fcc3, ZERO, %f16 - fand %f0, SIGN_BIT, SIGN_BIT - for %f16, SIGN_BIT, %f16 - siam (1 << 2) | 3 - faddd %f0, %f16, %f18 - siam (1 << 2) | 0 - fsubd %f18, %f16, %f18 - siam (0 << 2) - retl - for %f18, SIGN_BIT, %f0 -END (__floor_vis2) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis3.S deleted file mode 100644 index 1b275c2..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor-vis3.S +++ /dev/null @@ -1,59 +0,0 @@ -/* floor function, sparc64 vis3 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* 'siam' (Set Interval Arithmetic Mode) is used to quickly override - the rounding mode during this routine. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value and, - with suitable 'siam' initiated rouding mode settings, round - the final result in the proper direction. - - We also use VIS3 moves to avoid using the stack to transfer - values between float and integer registers. */ - -#define TWO_FIFTYTWO 0x43300000 /* 2**52 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__floor_vis3) - sethi %hi(TWO_FIFTYTWO), %o2 - fzero ZERO - sllx %o2, 32, %o2 - fnegd ZERO, SIGN_BIT - movxtod %o2, %f16 - fabsd %f0, %f14 - fcmpd %fcc3, %f14, %f16 - fmovduge %fcc3, ZERO, %f16 - fand %f0, SIGN_BIT, SIGN_BIT - for %f16, SIGN_BIT, %f16 - siam (1 << 2) | 3 - faddd %f0, %f16, %f18 - siam (1 << 2) | 0 - fsubd %f18, %f16, %f18 - siam (0 << 2) - retl - for %f18, SIGN_BIT, %f0 -END (__floor_vis3) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_floor.S deleted file mode 100644 index 989ccab..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_floor.S +++ /dev/null @@ -1,12 +0,0 @@ -#include <sparc-ifunc.h> - -SPARC_ASM_VIS3_VIS2_IFUNC(floor) - -weak_alias (__floor, floor) - -# undef weak_alias -# define weak_alias(a, b) - -#define __floor __floor_generic - -#include "../s_floor.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis2.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis2.S deleted file mode 100644 index ab7e110..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis2.S +++ /dev/null @@ -1,56 +0,0 @@ -/* Float floor function, sparc64 vis2 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* 'siam' (Set Interval Arithmetic Mode) is used to quickly override - the rounding mode during this routine. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value and, - with suitable 'siam' initiated rouding mode settings, round - the final result in the proper direction. */ - -#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__floorf_vis2) - sethi %hi(TWO_TWENTYTHREE), %o2 - fzeros ZERO - fnegs ZERO, SIGN_BIT - st %o2, [%sp + STACK_BIAS + 128] - fabss %f1, %f14 - ld [%sp + STACK_BIAS + 128], %f16 - fcmps %fcc3, %f14, %f16 - fmovsuge %fcc3, ZERO, %f16 - fands %f1, SIGN_BIT, SIGN_BIT - fors %f16, SIGN_BIT, %f16 - siam (1 << 2) | 3 - fadds %f1, %f16, %f5 - siam (1 << 2) | 0 - fsubs %f5, %f16, %f5 - siam (0 << 2) - retl - fors %f5, SIGN_BIT, %f0 -END (__floorf_vis2) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis3.S deleted file mode 100644 index b71e1cc..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf-vis3.S +++ /dev/null @@ -1,58 +0,0 @@ -/* Float floor function, sparc64 vis3 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* 'siam' (Set Interval Arithmetic Mode) is used to quickly override - the rounding mode during this routine. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value and, - with suitable 'siam' initiated rouding mode settings, round - the final result in the proper direction. - - We also use VIS3 moves to avoid using the stack to transfer - values between float and integer registers. */ - -#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__floorf_vis3) - sethi %hi(TWO_TWENTYTHREE), %o2 - fzeros ZERO - fnegs ZERO, SIGN_BIT - movwtos %o2, %f16 - fabss %f1, %f14 - fcmps %fcc3, %f14, %f16 - fmovsuge %fcc3, ZERO, %f16 - fands %f1, SIGN_BIT, SIGN_BIT - fors %f16, SIGN_BIT, %f16 - siam (1 << 2) | 3 - fadds %f1, %f16, %f5 - siam (1 << 2) | 0 - fsubs %f5, %f16, %f5 - siam (0 << 2) - retl - fors %f5, SIGN_BIT, %f0 -END (__floorf_vis3) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.S deleted file mode 100644 index d2a83cb..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_floorf.S +++ /dev/null @@ -1,12 +0,0 @@ -#include <sparc-ifunc.h> - -SPARC_ASM_VIS3_VIS2_IFUNC(floorf) - -weak_alias (__floorf, floorf) - -# undef weak_alias -# define weak_alias(a, b) - -#define __floorf __floorf_generic - -#include "../s_floorf.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.S deleted file mode 100644 index 63d0148..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc-vis3.S +++ /dev/null @@ -1,53 +0,0 @@ -/* Truncate argument to nearest integral value not larger than - the argument, sparc64 vis3 version. - - Copyright (C) 2013-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2013. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* We pop constants into the FPU registers using the incoming - argument stack slots, since this avoid having to use any PIC - references. We also thus avoid having to allocate a register - window. - - VIS instructions are used to facilitate the formation of - easier constants, and the propagation of the sign bit. */ - -#define TWO_FIFTYTWO 0x43300000 /* 2**52 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__trunc_vis3) - sethi %hi(TWO_FIFTYTWO), %o2 - sllx %o2, 32, %o2 - fzero ZERO - fnegd ZERO, SIGN_BIT - movxtod %o2, %f16 - fabsd %f0, %f14 - fcmpd %fcc3, %f14, %f16 - fmovduge %fcc3, ZERO, %f14 - fand %f0, SIGN_BIT, SIGN_BIT - fdtox %f14, %f14 - fxtod %f14, %f14 - faddd %f0, ZERO, %f18 - fmovduge %fcc3, %f18, %f14 - retl - for %f14, SIGN_BIT, %f0 -END (__trunc_vis3) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.S deleted file mode 100644 index 0d6f43a..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_trunc.S +++ /dev/null @@ -1,12 +0,0 @@ -#include <sparc-ifunc.h> - -SPARC_ASM_VIS3_IFUNC(trunc) - -weak_alias (__trunc, trunc) - -# undef weak_alias -# define weak_alias(a, b) - -#define __trunc __trunc_generic - -#include "../s_trunc.S" diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.S deleted file mode 100644 index 10b09c2..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf-vis3.S +++ /dev/null @@ -1,52 +0,0 @@ -/* Truncate argument to nearest integral value not larger than - the argument, sparc64 vis3 version. - - Copyright (C) 2013-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2013. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* We pop constants into the FPU registers using the incoming - argument stack slots, since this avoid having to use any PIC - references. We also thus avoid having to allocate a register - window. - - VIS instructions are used to facilitate the formation of - easier constants, and the propagation of the sign bit. */ - -#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__truncf_vis3) - sethi %hi(TWO_TWENTYTHREE), %o2 - fzeros ZERO - fnegs ZERO, SIGN_BIT - movwtos %o2,%f16 - fabss %f1, %f14 - fcmps %fcc3, %f14, %f16 - fmovsuge %fcc3, ZERO, %f14 - fands %f1, SIGN_BIT, SIGN_BIT - fstoi %f14, %f14 - fitos %f14, %f14 - fadds %f1, ZERO, %f18 - fmovsuge %fcc3, %f18, %f14 - retl - fors %f14, SIGN_BIT, %f0 -END (__truncf_vis3) diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.S deleted file mode 100644 index 2ca2517..0000000 --- a/sysdeps/sparc/sparc64/fpu/multiarch/s_truncf.S +++ /dev/null @@ -1,12 +0,0 @@ -#include <sparc-ifunc.h> - -SPARC_ASM_VIS3_IFUNC(truncf) - -weak_alias (__truncf, truncf) - -# undef weak_alias -# define weak_alias(a, b) - -#define __truncf __truncf_generic - -#include "../s_truncf.S" diff --git a/sysdeps/sparc/sparc64/fpu/s_ceil.S b/sysdeps/sparc/sparc64/fpu/s_ceil.S deleted file mode 100644 index 2c74438..0000000 --- a/sysdeps/sparc/sparc64/fpu/s_ceil.S +++ /dev/null @@ -1,83 +0,0 @@ -/* ceil function, sparc64 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* Since changing the rounding mode is extremely expensive, we - try to round up using a method that is rounding mode - agnostic. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value. - One of two things will happen for non-whole initial values. - Either the rounding mode will round it up, or it will be - rounded down. If the value started out whole, it will be - equal after the addition and subtraction. This means we - can accurately detect with one test whether we need to add - another 1.0 to round it up properly. - - We pop constants into the FPU registers using the incoming - argument stack slots, since this avoid having to use any - PIC references. We also thus avoid having to allocate a - register window. - - VIS instructions are used to facilitate the formation of - easier constants, and the propagation of the sign bit. */ - -#define TWO_FIFTYTWO 0x43300000 /* 2**52 */ -#define ONE_DOT_ZERO 0x3ff00000 /* 1.0 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__ceil) - sethi %hi(TWO_FIFTYTWO), %o2 - sethi %hi(ONE_DOT_ZERO), %o3 - fzero ZERO - - sllx %o2, 32, %o2 - fnegd ZERO, SIGN_BIT - - sllx %o3, 32, %o3 - stx %o2, [%sp + STACK_BIAS + 128] - fabsd %f0, %f14 - - ldd [%sp + STACK_BIAS + 128], %f16 - fcmpd %fcc3, %f14, %f16 - - fmovduge %fcc3, ZERO, %f16 - fand %f0, SIGN_BIT, SIGN_BIT - - for %f16, SIGN_BIT, %f16 - faddd %f0, %f16, %f18 - fsubd %f18, %f16, %f18 - fcmpd %fcc2, %f18, %f0 - stx %o3, [%sp + STACK_BIAS + 128] - - ldd [%sp + STACK_BIAS + 128], %f20 - fmovduge %fcc2, ZERO, %f20 - faddd %f18, %f20, %f0 - fabsd %f0, %f0 - retl - for %f0, SIGN_BIT, %f0 -END (__ceil) -weak_alias (__ceil, ceil) diff --git a/sysdeps/sparc/sparc64/fpu/s_ceilf.S b/sysdeps/sparc/sparc64/fpu/s_ceilf.S deleted file mode 100644 index 5542dc4..0000000 --- a/sysdeps/sparc/sparc64/fpu/s_ceilf.S +++ /dev/null @@ -1,81 +0,0 @@ -/* Float ceil function, sparc64 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* Since changing the rounding mode is extremely expensive, we - try to round up using a method that is rounding mode - agnostic. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value. - One of two things will happen for non-whole initial values. - Either the rounding mode will round it up, or it will be - rounded down. If the value started out whole, it will be - equal after the addition and subtraction. This means we - can accurately detect with one test whether we need to add - another 1.0 to round it up properly. - - We pop constants into the FPU registers using the incoming - argument stack slots, since this avoid having to use any - PIC references. We also thus avoid having to allocate a - register window. - - VIS instructions are used to facilitate the formation of - easier constants, and the propagation of the sign bit. */ - -#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ -#define ONE_DOT_ZERO 0x3f800000 /* 1.0 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__ceilf) - sethi %hi(TWO_TWENTYTHREE), %o2 - sethi %hi(ONE_DOT_ZERO), %o3 - fzeros ZERO - - fnegs ZERO, SIGN_BIT - - st %o2, [%sp + STACK_BIAS + 128] - fabss %f1, %f14 - - ld [%sp + STACK_BIAS + 128], %f16 - fcmps %fcc3, %f14, %f16 - - fmovsuge %fcc3, ZERO, %f16 - fands %f1, SIGN_BIT, SIGN_BIT - - fors %f16, SIGN_BIT, %f16 - fadds %f1, %f16, %f5 - fsubs %f5, %f16, %f5 - fcmps %fcc2, %f5, %f1 - st %o3, [%sp + STACK_BIAS + 128] - - ld [%sp + STACK_BIAS + 128], %f9 - fmovsuge %fcc2, ZERO, %f9 - fadds %f5, %f9, %f0 - fabss %f0, %f0 - retl - fors %f0, SIGN_BIT, %f0 -END (__ceilf) -weak_alias (__ceilf, ceilf) diff --git a/sysdeps/sparc/sparc64/fpu/s_floor.S b/sysdeps/sparc/sparc64/fpu/s_floor.S deleted file mode 100644 index aded393..0000000 --- a/sysdeps/sparc/sparc64/fpu/s_floor.S +++ /dev/null @@ -1,83 +0,0 @@ -/* floor function, sparc64 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* Since changing the rounding mode is extremely expensive, we - try to round up using a method that is rounding mode - agnostic. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value. - One of two things will happen for non-whole initial values. - Either the rounding mode will round it up, or it will be - rounded down. If the value started out whole, it will be - equal after the addition and subtraction. This means we - can accurately detect with one test whether we need to add - another 1.0 to round it up properly. - - We pop constants into the FPU registers using the incoming - argument stack slots, since this avoid having to use any - PIC references. We also thus avoid having to allocate a - register window. - - VIS instructions are used to facilitate the formation of - easier constants, and the propagation of the sign bit. */ - -#define TWO_FIFTYTWO 0x43300000 /* 2**52 */ -#define ONE_DOT_ZERO 0x3ff00000 /* 1.0 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__floor) - sethi %hi(TWO_FIFTYTWO), %o2 - sethi %hi(ONE_DOT_ZERO), %o3 - fzero ZERO - - sllx %o2, 32, %o2 - fnegd ZERO, SIGN_BIT - - sllx %o3, 32, %o3 - stx %o2, [%sp + STACK_BIAS + 128] - fabsd %f0, %f14 - - ldd [%sp + STACK_BIAS + 128], %f16 - fcmpd %fcc3, %f14, %f16 - - fmovduge %fcc3, ZERO, %f16 - fand %f0, SIGN_BIT, SIGN_BIT - - for %f16, SIGN_BIT, %f16 - faddd %f0, %f16, %f18 - fsubd %f18, %f16, %f18 - fcmpd %fcc2, %f18, %f0 - stx %o3, [%sp + STACK_BIAS + 128] - - ldd [%sp + STACK_BIAS + 128], %f20 - fmovdule %fcc2, ZERO, %f20 - fsubd %f18, %f20, %f0 - fabsd %f0, %f0 - retl - for %f0, SIGN_BIT, %f0 -END (__floor) -weak_alias (__floor, floor) diff --git a/sysdeps/sparc/sparc64/fpu/s_floorf.S b/sysdeps/sparc/sparc64/fpu/s_floorf.S deleted file mode 100644 index 9f20549..0000000 --- a/sysdeps/sparc/sparc64/fpu/s_floorf.S +++ /dev/null @@ -1,81 +0,0 @@ -/* Float floor function, sparc64 version. - Copyright (C) 2012-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2012. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* Since changing the rounding mode is extremely expensive, we - try to round up using a method that is rounding mode - agnostic. - - We add then subtract (or subtract than add if the initial - value was negative) 2**23 to the value, then subtract it - back out. - - This will clear out the fractional portion of the value. - One of two things will happen for non-whole initial values. - Either the rounding mode will round it up, or it will be - rounded down. If the value started out whole, it will be - equal after the addition and subtraction. This means we - can accurately detect with one test whether we need to add - another 1.0 to round it up properly. - - We pop constants into the FPU registers using the incoming - argument stack slots, since this avoid having to use any - PIC references. We also thus avoid having to allocate a - register window. - - VIS instructions are used to facilitate the formation of - easier constants, and the propagation of the sign bit. */ - -#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ -#define ONE_DOT_ZERO 0x3f800000 /* 1.0 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__floorf) - sethi %hi(TWO_TWENTYTHREE), %o2 - sethi %hi(ONE_DOT_ZERO), %o3 - fzeros ZERO - - fnegs ZERO, SIGN_BIT - - st %o2, [%sp + STACK_BIAS + 128] - fabss %f1, %f14 - - ld [%sp + STACK_BIAS + 128], %f16 - fcmps %fcc3, %f14, %f16 - - fmovsuge %fcc3, ZERO, %f16 - fands %f1, SIGN_BIT, SIGN_BIT - - fors %f16, SIGN_BIT, %f16 - fadds %f1, %f16, %f5 - fsubs %f5, %f16, %f5 - fcmps %fcc2, %f5, %f1 - st %o3, [%sp + STACK_BIAS + 128] - - ld [%sp + STACK_BIAS + 128], %f9 - fmovsule %fcc2, ZERO, %f9 - fsubs %f5, %f9, %f0 - fabss %f0, %f0 - retl - fors %f0, SIGN_BIT, %f0 -END (__floorf) -weak_alias (__floorf, floorf) diff --git a/sysdeps/sparc/sparc64/fpu/s_trunc.S b/sysdeps/sparc/sparc64/fpu/s_trunc.S deleted file mode 100644 index 34ecb14..0000000 --- a/sysdeps/sparc/sparc64/fpu/s_trunc.S +++ /dev/null @@ -1,55 +0,0 @@ -/* Truncate argument to nearest integral value not larger than - the argument, sparc64 version. - - Copyright (C) 2013-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2013. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* We pop constants into the FPU registers using the incoming - argument stack slots, since this avoid having to use any PIC - references. We also thus avoid having to allocate a register - window. - - VIS instructions are used to facilitate the formation of - easier constants, and the propagation of the sign bit. */ - -#define TWO_FIFTYTWO 0x43300000 /* 2**52 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__trunc) - sethi %hi(TWO_FIFTYTWO), %o2 - sllx %o2, 32, %o2 - fzero ZERO - fnegd ZERO, SIGN_BIT - stx %o2, [%sp + STACK_BIAS + 128] - fabsd %f0, %f14 - ldd [%sp + STACK_BIAS + 128], %f16 - fcmpd %fcc3, %f14, %f16 - fmovduge %fcc3, ZERO, %f14 - fand %f0, SIGN_BIT, SIGN_BIT - fdtox %f14, %f14 - fxtod %f14, %f14 - faddd %f0, ZERO, %f18 - fmovduge %fcc3, %f18, %f14 - retl - for %f14, SIGN_BIT, %f0 -END (__trunc) -weak_alias (__trunc, trunc) diff --git a/sysdeps/sparc/sparc64/fpu/s_truncf.S b/sysdeps/sparc/sparc64/fpu/s_truncf.S deleted file mode 100644 index 7bc7235..0000000 --- a/sysdeps/sparc/sparc64/fpu/s_truncf.S +++ /dev/null @@ -1,54 +0,0 @@ -/* Truncate argument to nearest integral value not larger than - the argument, sparc64 version. - - Copyright (C) 2013-2016 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by David S. Miller <davem@davemloft.net>, 2013. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <http://www.gnu.org/licenses/>. */ - -#include <sysdep.h> - - /* We pop constants into the FPU registers using the incoming - argument stack slots, since this avoid having to use any PIC - references. We also thus avoid having to allocate a register - window. - - VIS instructions are used to facilitate the formation of - easier constants, and the propagation of the sign bit. */ - -#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */ - -#define ZERO %f10 /* 0.0 */ -#define SIGN_BIT %f12 /* -0.0 */ - -ENTRY (__truncf) - sethi %hi(TWO_TWENTYTHREE), %o2 - fzeros ZERO - fnegs ZERO, SIGN_BIT - st %o2, [%sp + STACK_BIAS + 128] - fabss %f1, %f14 - ld [%sp + STACK_BIAS + 128], %f16 - fcmps %fcc3, %f14, %f16 - fmovsuge %fcc3, ZERO, %f14 - fands %f1, SIGN_BIT, SIGN_BIT - fstoi %f14, %f14 - fitos %f14, %f14 - fadds %f1, ZERO, %f18 - fmovsuge %fcc3, %f18, %f14 - retl - fors %f14, SIGN_BIT, %f0 -END (__truncf) -weak_alias (__truncf, truncf) |