diff options
| -rw-r--r-- | ports/ChangeLog.mips | 9 | ||||
| -rw-r--r-- | ports/sysdeps/mips/fpu/fedisblxcpt.c | 1 | ||||
| -rw-r--r-- | ports/sysdeps/mips/fpu/feenablxcpt.c | 1 | ||||
| -rw-r--r-- | ports/sysdeps/mips/fpu_control.h | 5 |
4 files changed, 12 insertions, 4 deletions
diff --git a/ports/ChangeLog.mips b/ports/ChangeLog.mips index 6e42b77..9b952c6 100644 --- a/ports/ChangeLog.mips +++ b/ports/ChangeLog.mips @@ -1,3 +1,12 @@ +2013-08-22 Maciej W. Rozycki <macro@codesourcery.com> + + * sysdeps/mips/fpu_control.h: Document bits reserved for + architecture implementers. + (_FPU_RESERVED): Clear bit #21. + * sysdeps/mips/fpu/fedisblxcpt.c (fedisableexcept): Don't clear + reserved bits. + * sysdeps/mips/fpu/feenablxcpt.c (feenableexcept): Likewise. + 2013-07-02 Joseph Myers <joseph@codesourcery.com> * sysdeps/mips/mips32/libm-test-ulps: Regenerated. diff --git a/ports/sysdeps/mips/fpu/fedisblxcpt.c b/ports/sysdeps/mips/fpu/fedisblxcpt.c index 1db197f..7498c0c 100644 --- a/ports/sysdeps/mips/fpu/fedisblxcpt.c +++ b/ports/sysdeps/mips/fpu/fedisblxcpt.c @@ -34,7 +34,6 @@ fedisableexcept (int excepts) excepts &= FE_ALL_EXCEPT; new_exc &= ~(excepts << ENABLE_SHIFT); - new_exc &= ~_FPU_RESERVED; _FPU_SETCW (new_exc); return old_exc; diff --git a/ports/sysdeps/mips/fpu/feenablxcpt.c b/ports/sysdeps/mips/fpu/feenablxcpt.c index 2a3a076..bca8e3d 100644 --- a/ports/sysdeps/mips/fpu/feenablxcpt.c +++ b/ports/sysdeps/mips/fpu/feenablxcpt.c @@ -34,7 +34,6 @@ feenableexcept (int excepts) excepts &= FE_ALL_EXCEPT; new_exc |= excepts << ENABLE_SHIFT; - new_exc &= ~_FPU_RESERVED; _FPU_SETCW (new_exc); return old_exc; diff --git a/ports/sysdeps/mips/fpu_control.h b/ports/sysdeps/mips/fpu_control.h index 6aecb3b..770cbb3 100644 --- a/ports/sysdeps/mips/fpu_control.h +++ b/ports/sysdeps/mips/fpu_control.h @@ -28,7 +28,8 @@ * causing unimplemented operation exception. This bit is only * available for MIPS III and newer. * 23 -> Condition bit - * 22-18 -> reserved (read as 0, write with 0) + * 22-21 -> reserved for architecture implementers + * 20-18 -> reserved (read as 0, write with 0) * 17 -> cause bit for unimplemented operation * 16 -> cause bit for invalid exception * 15 -> cause bit for division by zero exception @@ -84,7 +85,7 @@ extern fpu_control_t __fpu_control; #define _FPU_RC_UP 0x2 #define _FPU_RC_DOWN 0x3 -#define _FPU_RESERVED 0xfebc0000 /* Reserved bits in cw */ +#define _FPU_RESERVED 0xfe9c0000 /* Reserved bits in cw */ /* The fdlibm code requires strict IEEE double precision arithmetic, |