diff options
| -rw-r--r-- | ChangeLog | 6 | ||||
| -rw-r--r-- | NEWS | 4 | ||||
| -rw-r--r-- | sysdeps/sparc/sparc32/fpu/s_fdim.S | 3 |
3 files changed, 10 insertions, 3 deletions
@@ -1,3 +1,9 @@ +2013-11-06 David S. Miller <davem@davemloft.net> + + [BZ #15985] + * sysdeps/sparc/sparc32/fpu/s_fdim.S (__fdim): Do not use fnegd + on pre-v9 cpus, use a fnegs+fmovs sequence instead. + 2013-11-06 Will Newton <will.newton@linaro.org> * manual/memory.texi (Malloc Examples): Remove register @@ -16,8 +16,8 @@ Version 2.19 15748, 15749, 15754, 15760, 15763, 15764, 15797, 15799, 15825, 15844, 15847, 15849, 15855, 15856, 15857, 15859, 15867, 15886, 15887, 15890, 15892, 15893, 15895, 15897, 15905, 15909, 15917, 15919, 15921, 15923, - 15939, 15948, 15963, 15966, 15988, 16032, 16034, 16036, 16037, 16041, - 16071, 16072, 16074, 16078, 16112. + 15939, 15948, 15963, 15966, 15985, 15988, 16032, 16034, 16036, 16037, + 16041, 16071, 16072, 16074, 16078, 16112. * CVE-2012-4412 The strcoll implementation caches indices and rules for large collation sequences to optimize multiple passes. This cache diff --git a/sysdeps/sparc/sparc32/fpu/s_fdim.S b/sysdeps/sparc/sparc32/fpu/s_fdim.S index 2f0c5ce..22f69ce 100644 --- a/sysdeps/sparc/sparc32/fpu/s_fdim.S +++ b/sysdeps/sparc/sparc32/fpu/s_fdim.S @@ -30,7 +30,8 @@ ENTRY(__fdim) fbug 1f st %g0, [%sp + 76] ldd [%sp + 72], %f0 - fnegd %f0, %f2 + fnegs %f0, %f2 + fmovs %f1, %f3 1: retl fsubd %f0, %f2, %f0 END(__fdim) |