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authorAurelien Jarno <aurelien@aurel32.net>2016-08-03 00:22:44 +0200
committerAurelien Jarno <aurelien@aurel32.net>2016-08-03 00:22:44 +0200
commitee71e5b6dd6a21e981ad0fa74359e066f5a8b359 (patch)
treeeaff3336fa4eab0a7256ce3f1008941822ef0e1b /sysdeps
parent487890009e4ed87198331d0dae9b0be52d37f68c (diff)
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powerpc: fix ifunc-sel.h with GCC 6
On 32-bit PowerPC GCC 6 always saves the PIC register on the stack in the prologue and adjust the stack in the epilogue. It is therefore not possible anymore to just exit the function in the inline asm code, otherwise it corrupts the stack pointer. This causes the following tests to fail when using GCC 6: FAIL: elf/ifuncmain1 FAIL: elf/ifuncmain1pic FAIL: elf/ifuncmain1picstatic FAIL: elf/ifuncmain1pie FAIL: elf/ifuncmain1staticpic FAIL: elf/ifuncmain1staticpie FAIL: elf/ifuncmain1vis FAIL: elf/ifuncmain1vispic FAIL: elf/ifuncmain1vispie FAIL: elf/ifuncmain2pic FAIL: elf/ifuncmain2picstatic FAIL: elf/ifuncmain3 FAIL: elf/ifuncmain4picstatic FAIL: elf/ifuncmain5 FAIL: elf/ifuncmain5picstatic FAIL: elf/ifuncmain5staticpic The solution is to replace the beqlr instructions by a beq to the end of the inline asm code. This fixes all the above failures. ChangeLog: * sysdeps/powerpc/ifunc-sel.h (ifunc_sel): Replace beqlr instructions by beq instructions jumping to the end of the function.
Diffstat (limited to 'sysdeps')
-rw-r--r--sysdeps/powerpc/ifunc-sel.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/sysdeps/powerpc/ifunc-sel.h b/sysdeps/powerpc/ifunc-sel.h
index 526d8ed..79d110f 100644
--- a/sysdeps/powerpc/ifunc-sel.h
+++ b/sysdeps/powerpc/ifunc-sel.h
@@ -17,13 +17,14 @@ ifunc_sel (int (*f1) (void), int (*f2) (void), int (*f3) (void))
"addis %0,11,%2-1b@ha\n\t"
"addi %0,%0,%2-1b@l\n\t"
"cmpwi 12,1\n\t"
- "beqlr\n\t"
+ "beq 2f\n\t"
"addis %0,11,%3-1b@ha\n\t"
"addi %0,%0,%3-1b@l\n\t"
"cmpwi 12,-1\n\t"
- "beqlr\n\t"
+ "beq 2f\n\t"
"addis %0,11,%4-1b@ha\n\t"
- "addi %0,%0,%4-1b@l"
+ "addi %0,%0,%4-1b@l\n\t"
+ "2:"
: "=r" (ret)
: "X" (&global), "X" (f1), "X" (f2), "X" (f3));
return ret;