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| author | Kito Cheng <kito.cheng@sifive.com> | 2022-07-05 17:46:31 +0800 |
|---|---|---|
| committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2022-08-08 11:28:40 -0300 |
| commit | 8bc3f94a062776abfaf14201fba37bea5328bf92 (patch) | |
| tree | 5c20abdf448e6e4c98d86d4d09b9a3cefbe85ee7 /sysdeps | |
| parent | 26a3499cdbc537de1b6305ed5e6bcff02734f51e (diff) | |
| download | glibc-8bc3f94a062776abfaf14201fba37bea5328bf92.zip glibc-8bc3f94a062776abfaf14201fba37bea5328bf92.tar.gz glibc-8bc3f94a062776abfaf14201fba37bea5328bf92.tar.bz2 | |
soft-fp: Add fixhf[uns][di|si] and float[uns][di|si]hf
Add more IEEE half conversion routines:
- Convert 32-bit/64-bit integer to IEEE half.
- Convert IEEE half to 32-bit/64-bit integer.
They are required by RISC-V _Float16 support, tested with RISC-V GCC.
Diffstat (limited to 'sysdeps')
0 files changed, 0 insertions, 0 deletions