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author | Torvald Riegel <triegel@redhat.com> | 2016-06-14 15:12:00 +0200 |
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committer | Torvald Riegel <triegel@redhat.com> | 2016-06-24 23:04:40 +0300 |
commit | 76a0b73e8102c5bfb5cb791e34992472f5d1d33e (patch) | |
tree | 2fcd8ece66b944eed3ca046d79651c7a7573736f /sysdeps | |
parent | 40244be3729149ff440caf18e445ec17b0d0b511 (diff) | |
download | glibc-76a0b73e8102c5bfb5cb791e34992472f5d1d33e.zip glibc-76a0b73e8102c5bfb5cb791e34992472f5d1d33e.tar.gz glibc-76a0b73e8102c5bfb5cb791e34992472f5d1d33e.tar.bz2 |
Remove atomic_compare_and_exchange_bool_rel.
atomic_compare_and_exchange_bool_rel and
catomic_compare_and_exchange_bool_rel are removed and replaced with the
new C11-like atomic_compare_exchange_weak_release. The concurrent code
in nscd/cache.c has not been reviewed yet, so this patch does not add
detailed comments.
* nscd/cache.c (cache_add): Use new C11-like atomic operation instead
of atomic_compare_and_exchange_bool_rel.
* nptl/pthread_mutex_unlock.c (__pthread_mutex_unlock_full): Likewise.
* include/atomic.h (atomic_compare_and_exchange_bool_rel,
catomic_compare_and_exchange_bool_rel): Remove.
* sysdeps/aarch64/atomic-machine.h
(atomic_compare_and_exchange_bool_rel): Likewise.
* sysdeps/alpha/atomic-machine.h
(atomic_compare_and_exchange_bool_rel): Likewise.
* sysdeps/arm/atomic-machine.h
(atomic_compare_and_exchange_bool_rel): Likewise.
* sysdeps/mips/atomic-machine.h
(atomic_compare_and_exchange_bool_rel): Likewise.
* sysdeps/tile/atomic-machine.h
(atomic_compare_and_exchange_bool_rel): Likewise.
Diffstat (limited to 'sysdeps')
-rw-r--r-- | sysdeps/aarch64/atomic-machine.h | 4 | ||||
-rw-r--r-- | sysdeps/alpha/atomic-machine.h | 4 | ||||
-rw-r--r-- | sysdeps/arm/atomic-machine.h | 4 | ||||
-rw-r--r-- | sysdeps/microblaze/atomic-machine.h | 6 | ||||
-rw-r--r-- | sysdeps/mips/atomic-machine.h | 8 | ||||
-rw-r--r-- | sysdeps/powerpc/atomic-machine.h | 6 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc32/atomic-machine.h | 19 | ||||
-rw-r--r-- | sysdeps/powerpc/powerpc64/atomic-machine.h | 33 | ||||
-rw-r--r-- | sysdeps/tile/atomic-machine.h | 5 |
9 files changed, 0 insertions, 89 deletions
diff --git a/sysdeps/aarch64/atomic-machine.h b/sysdeps/aarch64/atomic-machine.h index 28c80dc..6708b9b 100644 --- a/sysdeps/aarch64/atomic-machine.h +++ b/sysdeps/aarch64/atomic-machine.h @@ -115,10 +115,6 @@ typedef uintmax_t uatomic_max_t; /* Compare and exchange with "release" semantics, ie barrier before. */ -# define atomic_compare_and_exchange_bool_rel(mem, new, old) \ - __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \ - mem, new, old, __ATOMIC_RELEASE) - # define atomic_compare_and_exchange_val_rel(mem, new, old) \ __atomic_val_bysize (__arch_compare_and_exchange_val, int, \ mem, new, old, __ATOMIC_RELEASE) diff --git a/sysdeps/alpha/atomic-machine.h b/sysdeps/alpha/atomic-machine.h index d96cb7a..882d800 100644 --- a/sysdeps/alpha/atomic-machine.h +++ b/sysdeps/alpha/atomic-machine.h @@ -210,10 +210,6 @@ typedef uintmax_t uatomic_max_t; /* Compare and exchange with "release" semantics, ie barrier before. */ -#define atomic_compare_and_exchange_bool_rel(mem, new, old) \ - __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \ - mem, new, old, __MB, "") - #define atomic_compare_and_exchange_val_rel(mem, new, old) \ __atomic_val_bysize (__arch_compare_and_exchange_val, int, \ mem, new, old, __MB, "") diff --git a/sysdeps/arm/atomic-machine.h b/sysdeps/arm/atomic-machine.h index dd5e714..916c09a 100644 --- a/sysdeps/arm/atomic-machine.h +++ b/sysdeps/arm/atomic-machine.h @@ -87,10 +87,6 @@ void __arm_link_error (void); /* Compare and exchange with "release" semantics, ie barrier before. */ -# define atomic_compare_and_exchange_bool_rel(mem, new, old) \ - __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \ - mem, new, old, __ATOMIC_RELEASE) - # define atomic_compare_and_exchange_val_rel(mem, new, old) \ __atomic_val_bysize (__arch_compare_and_exchange_val, int, \ mem, new, old, __ATOMIC_RELEASE) diff --git a/sysdeps/microblaze/atomic-machine.h b/sysdeps/microblaze/atomic-machine.h index af7acac..229fd49 100644 --- a/sysdeps/microblaze/atomic-machine.h +++ b/sysdeps/microblaze/atomic-machine.h @@ -47,12 +47,6 @@ typedef uintmax_t uatomic_max_t; #define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \ (abort (), 0) -#define __arch_compare_and_exchange_bool_8_rel(mem, newval, oldval) \ - (abort (), 0) - -#define __arch_compare_and_exchange_bool_16_rel(mem, newval, oldval) \ - (abort (), 0) - #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ ({ \ __typeof (*(mem)) __tmp; \ diff --git a/sysdeps/mips/atomic-machine.h b/sysdeps/mips/atomic-machine.h index a60e4fb..771166b 100644 --- a/sysdeps/mips/atomic-machine.h +++ b/sysdeps/mips/atomic-machine.h @@ -149,10 +149,6 @@ typedef uintmax_t uatomic_max_t; /* Compare and exchange with "release" semantics, ie barrier before. */ -# define atomic_compare_and_exchange_bool_rel(mem, new, old) \ - __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \ - mem, new, old, __ATOMIC_RELEASE) - # define atomic_compare_and_exchange_val_rel(mem, new, old) \ __atomic_val_bysize (__arch_compare_and_exchange_val, int, \ mem, new, old, __ATOMIC_RELEASE) @@ -330,10 +326,6 @@ typedef uintmax_t uatomic_max_t; /* Compare and exchange with "release" semantics, ie barrier before. */ -# define atomic_compare_and_exchange_bool_rel(mem, new, old) \ - __atomic_bool_bysize (__arch_compare_and_exchange_bool, int, \ - mem, new, old, MIPS_SYNC_STR, "") - # define atomic_compare_and_exchange_val_rel(mem, new, old) \ __atomic_val_bysize (__arch_compare_and_exchange_val, int, \ mem, new, old, MIPS_SYNC_STR, "") diff --git a/sysdeps/powerpc/atomic-machine.h b/sysdeps/powerpc/atomic-machine.h index 8b0e1e7..c6b9eea 100644 --- a/sysdeps/powerpc/atomic-machine.h +++ b/sysdeps/powerpc/atomic-machine.h @@ -53,12 +53,6 @@ typedef uintmax_t uatomic_max_t; #define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \ (abort (), 0) -#define __arch_compare_and_exchange_bool_8_rel(mem, newval, oldval) \ - (abort (), 0) - -#define __arch_compare_and_exchange_bool_16_rel(mem, newval, oldval) \ - (abort (), 0) - #ifdef UP # define __ARCH_ACQ_INSTR "" # define __ARCH_REL_INSTR "" diff --git a/sysdeps/powerpc/powerpc32/atomic-machine.h b/sysdeps/powerpc/powerpc32/atomic-machine.h index 1d407b3..40a8b7b 100644 --- a/sysdeps/powerpc/powerpc32/atomic-machine.h +++ b/sysdeps/powerpc/powerpc32/atomic-machine.h @@ -58,22 +58,6 @@ __tmp != 0; \ }) -#define __arch_compare_and_exchange_bool_32_rel(mem, newval, oldval) \ -({ \ - unsigned int __tmp; \ - __asm __volatile (__ARCH_REL_INSTR "\n" \ - "1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \ - " subf. %0,%2,%0\n" \ - " bne 2f\n" \ - " stwcx. %3,0,%1\n" \ - " bne- 1b\n" \ - "2: " \ - : "=&r" (__tmp) \ - : "b" (mem), "r" (oldval), "r" (newval) \ - : "cr0", "memory"); \ - __tmp != 0; \ -}) - /* Powerpc32 processors don't implement the 64-bit (doubleword) forms of load and reserve (ldarx) and store conditional (stdcx.) instructions. So for powerpc32 we stub out the 64-bit forms. */ @@ -83,9 +67,6 @@ #define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \ (abort (), (__typeof (*mem)) 0) -#define __arch_compare_and_exchange_bool_64_rel(mem, newval, oldval) \ - (abort (), 0) - #define __arch_compare_and_exchange_val_64_rel(mem, newval, oldval) \ (abort (), (__typeof (*mem)) 0) diff --git a/sysdeps/powerpc/powerpc64/atomic-machine.h b/sysdeps/powerpc/powerpc64/atomic-machine.h index 751487a..7971318 100644 --- a/sysdeps/powerpc/powerpc64/atomic-machine.h +++ b/sysdeps/powerpc/powerpc64/atomic-machine.h @@ -58,23 +58,6 @@ __tmp != 0; \ }) -#define __arch_compare_and_exchange_bool_32_rel(mem, newval, oldval) \ -({ \ - unsigned int __tmp, __tmp2; \ - __asm __volatile (__ARCH_REL_INSTR "\n" \ - " clrldi %1,%1,32\n" \ - "1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \ - " subf. %0,%1,%0\n" \ - " bne 2f\n" \ - " stwcx. %4,0,%2\n" \ - " bne- 1b\n" \ - "2: " \ - : "=&r" (__tmp), "=r" (__tmp2) \ - : "b" (mem), "1" (oldval), "r" (newval) \ - : "cr0", "memory"); \ - __tmp != 0; \ -}) - /* * Only powerpc64 processors support Load doubleword and reserve index (ldarx) * and Store doubleword conditional indexed (stdcx) instructions. So here @@ -96,22 +79,6 @@ __tmp != 0; \ }) -#define __arch_compare_and_exchange_bool_64_rel(mem, newval, oldval) \ -({ \ - unsigned long __tmp; \ - __asm __volatile (__ARCH_REL_INSTR "\n" \ - "1: ldarx %0,0,%1" MUTEX_HINT_REL "\n" \ - " subf. %0,%2,%0\n" \ - " bne 2f\n" \ - " stdcx. %3,0,%1\n" \ - " bne- 1b\n" \ - "2: " \ - : "=&r" (__tmp) \ - : "b" (mem), "r" (oldval), "r" (newval) \ - : "cr0", "memory"); \ - __tmp != 0; \ -}) - #define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \ ({ \ __typeof (*(mem)) __tmp; \ diff --git a/sysdeps/tile/atomic-machine.h b/sysdeps/tile/atomic-machine.h index 651e0d9..336518c 100644 --- a/sysdeps/tile/atomic-machine.h +++ b/sysdeps/tile/atomic-machine.h @@ -55,11 +55,6 @@ typedef uintmax_t uatomic_max_t; atomic_full_barrier (); \ atomic_compare_and_exchange_val_acq ((mem), (n), (o)); \ }) -#define atomic_compare_and_exchange_bool_rel(mem, n, o) \ - ({ \ - atomic_full_barrier (); \ - atomic_compare_and_exchange_bool_acq ((mem), (n), (o)); \ - }) #define atomic_exchange_rel(mem, n) \ ({ \ atomic_full_barrier (); \ |