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authorJoseph Myers <joseph@codesourcery.com>2015-10-28 18:50:20 +0000
committerJoseph Myers <joseph@codesourcery.com>2015-10-28 18:50:20 +0000
commit0b9af583a5c2d68085e88cece13952bf05dc4882 (patch)
treeefc4a66a9b018447c371749d91cf8a5b8508754f /sysdeps/x86_64
parenteae6c382bdca2e7ac582a69d56c9c228b678ee67 (diff)
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Fix i386/x86_64 fesetenv SSE exception clearing (bug 19181).
The i386 and x86_64 versions of fesetenv, when called with FE_DFL_ENV or FE_NOMASK_ENV as argument, do not clear SSE exceptions raised in MXCSR. These arguments should, like other fenv_t values, represent the whole of the floating-point state, so such exceptions should be cleared; this patch adds the required clearing. (Discovered while working on bug 16068.) Tested for x86_64 and x86. [BZ #19181] * sysdeps/i386/fpu/fesetenv.c (__fesetenv): Clear already-raised SSE exceptions when argument is FE_DFL_ENV or FE_NOMASK_ENV. * sysdeps/x86_64/fpu/fesetenv.c (__fesetenv): Likewise. * math/test-fenv-clear-main.c: New file. * math/test-fenv-clear.c: Likewise. * math/Makefile (tests): Add test-fenv-clear. * sysdeps/x86/fpu/test-fenv-clear-sse.c: New file. * sysdeps/x86/fpu/Makefile [$(subdir) = math] (tests): Add test-fenv-clear-sse. [$(subdir) = math] (CFLAGS-test-fenv-clear-sse.c): New variable.
Diffstat (limited to 'sysdeps/x86_64')
-rw-r--r--sysdeps/x86_64/fpu/fesetenv.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/sysdeps/x86_64/fpu/fesetenv.c b/sysdeps/x86_64/fpu/fesetenv.c
index 3e3fd84..9950aa7 100644
--- a/sysdeps/x86_64/fpu/fesetenv.c
+++ b/sysdeps/x86_64/fpu/fesetenv.c
@@ -42,6 +42,8 @@ __fesetenv (const fenv_t *envp)
temp.__opcode = 0;
temp.__data_offset = 0;
temp.__data_selector = 0;
+ /* Clear SSE exceptions. */
+ temp.__mxcsr &= ~FE_ALL_EXCEPT;
/* Set mask for SSE MXCSR. */
temp.__mxcsr |= (FE_ALL_EXCEPT << 7);
/* Set rounding to FE_TONEAREST. */
@@ -57,6 +59,8 @@ __fesetenv (const fenv_t *envp)
temp.__opcode = 0;
temp.__data_offset = 0;
temp.__data_selector = 0;
+ /* Clear SSE exceptions. */
+ temp.__mxcsr &= ~FE_ALL_EXCEPT;
/* Set mask for SSE MXCSR. */
/* Set rounding to FE_TONEAREST. */
temp.__mxcsr &= ~ 0x6000;