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author | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-03-20 11:24:52 -0500 |
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committer | Adhemerval Zanella <azanella@linux.vnet.ibm.com> | 2014-03-20 11:24:52 -0500 |
commit | 6eaf95cbfa0031ea267682dc2c9c17ed3e3dc167 (patch) | |
tree | 93cf4f0efb9ce1654e9f298b6342953a7935965a /sysdeps/x86_64/fpu | |
parent | ae3a5dff0f4135cc57ddddf3c19ed5be80285b54 (diff) | |
download | glibc-6eaf95cbfa0031ea267682dc2c9c17ed3e3dc167.zip glibc-6eaf95cbfa0031ea267682dc2c9c17ed3e3dc167.tar.gz glibc-6eaf95cbfa0031ea267682dc2c9c17ed3e3dc167.tar.bz2 |
PowerPC: optimized strcspn for PPC64/POWER7
This patch add a optimized strcspn for POWER7 by using a different
algorithm than default implementation: it constructs a table based on
the 'accept' argument and use this table to check for any occurance
on the input string. The idea is similar as x86_64 uses.
For PowerPC some tunings were added, such as unroll loops and align
stack memory to table to 16 bytes (so VSX clean can ran without
alignment issues).
Diffstat (limited to 'sysdeps/x86_64/fpu')
0 files changed, 0 insertions, 0 deletions