RISC-V: Build Infastructure

This patch lays out the top-level orginazition of the RISC-V port.  It
contains all the Implies files as well as various other fragments of
build infastructure for the RISC-V port.  This contains the only change
to a shared file: config.h.in.

RISC-V is a family of base ISAs with optional extensions.  The base ISAs
are RV32I and RV64I, which are 32-bit and 64-bit integer-only ISAs, but
this port currently only supports RV64I based systems.  Support for
RISC-V lives in in sysdeps/riscv.  In addition to these ISAs, our glibc
port supports most of the currently-defined extensions: the A extension
for atomics, the M extension for multiplication, the C extension for
compressed instructions, and the F/D extensions for single/double
precision IEEE floating-point.  Most of these extensions are handled by
GCC, but glibc defines various floating-point wrappers and emulation
routines as well as some atomic wrappers.

We support running glibc-based programs on Linux, the support for which
lives in sysdeps/unix/sysv/linux/riscv.

2018-01-29  Palmer Dabbelt  <palmer@sifive.com>

        * sysdeps/riscv/Implies: New file.
        * sysdeps/riscv/Makefile: Likewise.
        * sysdeps/riscv/configure: Likewise.
        * sysdeps/riscv/configure.ac: Likewise.
        * sysdeps/riscv/nptl/Makefile: Likewise.
        * sysdeps/riscv/preconfigure: Likewise.
        * sysdeps/riscv/rv64/Implies-after: Likewise.
        * sysdeps/riscv/rv64/rvd/Implies: Likewise.
        * sysdeps/riscv/rv64/rvf/Implies: Likewise.
        * sysdeps/unix/sysv/linux/riscv/Implies: Likewise.
        * sysdeps/unix/sysv/linux/riscv/Makefile: Likewise.
        * sysdeps/unix/sysv/linux/riscv/Versions: Likewise.
        * sysdeps/unix/sysv/linux/riscv/configure: Likewise.
        * sysdeps/unix/sysv/linux/riscv/configure.ac: Likewise.
        * sysdeps/unix/sysv/linux/riscv/ldd-rewrite.sed: Likewise.
        * sysdeps/unix/sysv/linux/riscv/rv64/Implies: Likewise.
        * sysdeps/unix/sysv/linux/riscv/rv64/Makefile: Likewise.
        * sysdeps/unix/sysv/linux/riscv/shlib-versions: Likewise.

9 files changed, 122 insertions, 0 deletions

diff --git a/sysdeps/riscv/Implies b/sysdeps/riscv/Implies
new file mode 100644
index 0000000..c88325b
--- /dev/null
+++ b/sysdeps/riscv/Implies
@@ -0,0 +1,5 @@
+init_array
+
+ieee754/ldbl-128
+ieee754/dbl-64
+ieee754/flt-32
diff --git a/sysdeps/riscv/Makefile b/sysdeps/riscv/Makefile
new file mode 100644
index 0000000..20a9968
--- /dev/null
+++ b/sysdeps/riscv/Makefile
@@ -0,0 +1,7 @@
+ifeq ($(subdir),misc)
+sysdep_headers += sys/asm.h
+endif
+
+# RISC-V's assembler also needs to know about PIC as it changes the definition
+# of some assembler macros.
+ASFLAGS-.os += $(pic-ccflag)
diff --git a/sysdeps/riscv/configure b/sysdeps/riscv/configure
new file mode 100644
index 0000000..53f5f1b
--- /dev/null
+++ b/sysdeps/riscv/configure
@@ -0,0 +1,4 @@
+# This file is generated from configure.ac by Autoconf.  DO NOT EDIT!
+ # Local configure fragment for sysdeps/riscv/elf.
+
+$as_echo "#define PI_STATIC_AND_HIDDEN 1" >>confdefs.h
diff --git a/sysdeps/riscv/configure.ac b/sysdeps/riscv/configure.ac
new file mode 100644
index 0000000..34f62d4
--- /dev/null
+++ b/sysdeps/riscv/configure.ac
@@ -0,0 +1,4 @@
+GLIBC_PROVIDES dnl See aclocal.m4 in the top level source directory.
+# Local configure fragment for sysdeps/riscv/elf.
+
+AC_DEFINE(PI_STATIC_AND_HIDDEN)
diff --git a/sysdeps/riscv/nptl/Makefile b/sysdeps/riscv/nptl/Makefile
new file mode 100644
index 0000000..c3cc7f3
--- /dev/null
+++ b/sysdeps/riscv/nptl/Makefile
@@ -0,0 +1,26 @@
+# Makefile for sysdeps/riscv/nptl.
+# Copyright (C) 2005-2018 Free Software Foundation, Inc.
+# This file is part of the GNU C Library.
+#
+# The GNU C Library is free software; you can redistribute it and/or
+# modify it under the terms of the GNU Lesser General Public
+# License as published by the Free Software Foundation; either
+# version 2.1 of the License, or (at your option) any later version.
+#
+# The GNU C Library is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+# Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public
+# License along with the GNU C Library; if not, see
+# <http://www.gnu.org/licenses/>.
+
+ifeq ($(subdir),csu)
+gen-as-const-headers += tcb-offsets.sym
+endif
+
+ifeq ($(subdir),nptl)
+libpthread-sysdep_routines += nptl-sysdep
+libpthread-shared-only-routines += nptl-sysdep
+endif
diff --git a/sysdeps/riscv/preconfigure b/sysdeps/riscv/preconfigure
new file mode 100644
index 0000000..d9adb31
--- /dev/null
+++ b/sysdeps/riscv/preconfigure
@@ -0,0 +1,71 @@
+case "$machine" in
+riscv*)
+    xlen=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | sed -n 's/^#define __riscv_xlen \(.*\)/\1/p'`
+    flen=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | sed -n 's/^#define __riscv_flen \(.*\)/\1/p'`
+    float_abi=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | sed -n 's/^#define __riscv_float_abi_\([^ ]*\) .*/\1/p'`
+    atomic=`$CC $CFLAGS $CPPFLAGS -E -dM -xc /dev/null | grep '#define __riscv_atomic' | cut -d' ' -f2`
+
+    case "$xlen" in
+    32)
+	echo "glibc does not yet support 32-bit systems" >&2
+	exit 1
+	;;
+    64)
+	;;
+    *)
+	echo "Unable to determine XLEN" >&2
+	exit 1
+	;;
+    esac
+
+    case "$flen" in
+    64)
+	float_machine=rvd
+	with_fp_cond=1
+	;;
+    32)
+	echo "glibc does not yet support systems with the F but not D extensions" >&2
+	exit 1
+	;;
+    "")
+	with_fp_cond=0
+	;;
+    *)
+	echo "Unable to determine FLEN" >&2
+	exit 1
+	;;
+    esac
+
+    case "$float_abi" in
+    soft)
+	abi_flen=0
+	;;
+    single)
+	echo "glibc does not yet support the single floating-point ABI" >&2
+	exit 1
+	;;
+    double)
+	abi_flen=64
+	;;
+    *)
+	echo "Unable to determine floating-point ABI" >&2
+	exit 1
+	;;
+    esac
+
+    case "$atomic" in
+    __riscv_atomic)
+        ;;
+    *)
+        echo "glibc requires the A extension" >&2
+	exit 1
+	;;
+    esac
+
+    base_machine=riscv
+    machine=riscv/rv$xlen/$float_machine
+
+    $as_echo "#define RISCV_ABI_XLEN $xlen" >>confdefs.h
+    $as_echo "#define RISCV_ABI_FLEN $abi_flen" >>confdefs.h
+    ;;
+esac
diff --git a/sysdeps/riscv/rv64/Implies-after b/sysdeps/riscv/rv64/Implies-after
new file mode 100644
index 0000000..a8cae95
--- /dev/null
+++ b/sysdeps/riscv/rv64/Implies-after
@@ -0,0 +1 @@
+wordsize-64
diff --git a/sysdeps/riscv/rv64/rvd/Implies b/sysdeps/riscv/rv64/rvd/Implies
new file mode 100644
index 0000000..42fb132
--- /dev/null
+++ b/sysdeps/riscv/rv64/rvd/Implies
@@ -0,0 +1,3 @@
+riscv/rv64/rvf
+riscv/rvd
+riscv/rvf
diff --git a/sysdeps/riscv/rv64/rvf/Implies b/sysdeps/riscv/rv64/rvf/Implies
new file mode 100644
index 0000000..66c4014
--- /dev/null
+++ b/sysdeps/riscv/rv64/rvf/Implies
@@ -0,0 +1 @@
+riscv/rvf