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authorAlistair Francis <alistair.francis@wdc.com>2020-02-10 10:36:21 -0800
committerAlistair Francis <alistair.francis@wdc.com>2020-08-27 08:17:42 -0700
commit5b6113d62efabb123db433b14adddd4a5fb6b7ec (patch)
tree1959bde3e74c6e491bbce89f0f8e1806647c9225 /sysdeps/riscv/sys
parent07598d76006faec6c60a9d86bda44dcb81b3a743 (diff)
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RISC-V: Support the 32-bit ABI implementation
This patch adds the ABI implementation for 32-bit RISC-V. It contains the Linux-specific and RISC-V architecture code. Reviewed-by: Maciej W. Rozycki <macro@wdc.com>
Diffstat (limited to 'sysdeps/riscv/sys')
-rw-r--r--sysdeps/riscv/sys/asm.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/sysdeps/riscv/sys/asm.h b/sysdeps/riscv/sys/asm.h
index bd2de17..8292ec7 100644
--- a/sysdeps/riscv/sys/asm.h
+++ b/sysdeps/riscv/sys/asm.h
@@ -22,11 +22,14 @@
/* Macros to handle different pointer/register sizes for 32/64-bit code. */
#if __riscv_xlen == 64
# define PTRLOG 3
-# define SZREG 8
+# define SZREG 8
# define REG_S sd
# define REG_L ld
#elif __riscv_xlen == 32
-# error "rv32i-based targets are not supported"
+# define PTRLOG 2
+# define SZREG 4
+# define REG_S sw
+# define REG_L lw
#else
# error __riscv_xlen must equal 32 or 64
#endif