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authorJoseph Myers <joseph@codesourcery.com>2016-10-19 22:58:34 +0000
committerJoseph Myers <joseph@codesourcery.com>2016-10-19 22:58:34 +0000
commit05f3ed0a799d08c2b3ecc256fc0dc08d8b9a3784 (patch)
tree1904f26eb95916cec76cb876dbe163bb72593235 /sysdeps/powerpc/powerpc64/fpu
parentf8e8b8ed9f266097b42a77359445372d82365916 (diff)
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Stop powerpc copysignl raising "invalid" for sNaN argument (bug 20718).
The powerpc (hard-float) implementations of copysignl, both 32-bit and 64-bit, raise spurious "invalid" exceptions when the first argument is a signaling NaN. copysign functions should never raise exceptions even for signaling NaNs. The problem is the use of an fcmpu instruction to test the sign of the high part of the long double argument. This patch fixes the functions to use fsel instead (as used for fabsl following my fixes for a similar bug there), or to examine the integer representation for older 32-bit processors without fsel. Tested for powerpc64 and powerpc32 (configurations with and without fsel used). [BZ #20718] * sysdeps/powerpc/powerpc32/fpu/s_copysignl.S (__copysignl): Do not use floating-point comparisons to test sign. * sysdeps/powerpc/powerpc64/fpu/s_copysignl.S (__copysignl): Likewise.
Diffstat (limited to 'sysdeps/powerpc/powerpc64/fpu')
-rw-r--r--sysdeps/powerpc/powerpc64/fpu/s_copysignl.S10
1 files changed, 4 insertions, 6 deletions
diff --git a/sysdeps/powerpc/powerpc64/fpu/s_copysignl.S b/sysdeps/powerpc/powerpc64/fpu/s_copysignl.S
index 1e1b9d4..548076d 100644
--- a/sysdeps/powerpc/powerpc64/fpu/s_copysignl.S
+++ b/sysdeps/powerpc/powerpc64/fpu/s_copysignl.S
@@ -30,16 +30,14 @@ ENTRY(__copysignl)
blt L(0)
fmr fp0,fp1
fabs fp1,fp1
- fcmpu cr1,fp0,fp1
- beqlr cr1
- fneg fp2,fp2
+ fneg fp3,fp2
+ fsel fp2,fp0,fp2,fp3
blr
L(0):
fmr fp0,fp1
fnabs fp1,fp1
- fcmpu cr1,fp0,fp1
- beqlr cr1
- fneg fp2,fp2
+ fneg fp3,fp2
+ fsel fp2,fp0,fp3,fp2
blr
END (__copysignl)