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authorTulio Magno Quites Machado Filho <tuliom@linux.ibm.com>2020-01-10 19:14:56 -0300
committerTulio Magno Quites Machado Filho <tuliom@linux.ibm.com>2020-01-17 09:05:03 -0300
commit18363b4f010da9ba459b13310b113ac0647c2fcc (patch)
treea9b4b22d7fb65d7d219eb0e10b996de971da54e9 /sysdeps/powerpc/powerpc64/a2
parentc908ae0492cb9c68736306e2bceec7244a940568 (diff)
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powerpc: Move cache line size to rtld_global_ro
GCC 10.0 enabled -fno-common by default and this started to point that __cache_line_size had been implemented in 2 different places: loader and libc. In order to avoid this duplication, the libc variable has been removed and the loader variable is moved to rtld_global_ro. File sysdeps/unix/sysv/linux/powerpc/dl-auxv.h has been added in order to reuse code for both static and dynamic linking scenarios. Reviewed-by: Carlos O'Donell <carlos@redhat.com>
Diffstat (limited to 'sysdeps/powerpc/powerpc64/a2')
-rw-r--r--sysdeps/powerpc/powerpc64/a2/memcpy.S13
1 files changed, 8 insertions, 5 deletions
diff --git a/sysdeps/powerpc/powerpc64/a2/memcpy.S b/sysdeps/powerpc/powerpc64/a2/memcpy.S
index 0e3c435..1162cc2 100644
--- a/sysdeps/powerpc/powerpc64/a2/memcpy.S
+++ b/sysdeps/powerpc/powerpc64/a2/memcpy.S
@@ -18,6 +18,7 @@
<https://www.gnu.org/licenses/>. */
#include <sysdep.h>
+#include <rtld-global-offsets.h>
#ifndef MEMCPY
# define MEMCPY memcpy
@@ -27,8 +28,9 @@
#define ZERO_AHEAD 2 /* no cache lines DST zeroing ahead */
.section ".toc","aw"
-.LC0:
- .tc __cache_line_size[TC],__cache_line_size
+__GLRO_DEF(dl_cache_line_size)
+
+
.section ".text"
.align 2
@@ -55,10 +57,11 @@ ENTRY (MEMCPY, 5)
*/
neg r8,r3 /* LS 4 bits = # bytes to 8-byte dest bdry */
- ld r9,.LC0@toc(r2) /* Get cache line size (part 1) */
+ /* Get the cache line size. */
+ __GLRO (r9, dl_cache_line_size,
+ RTLD_GLOBAL_RO_DL_CACHE_LINE_SIZE_OFFSET)
clrldi r8,r8,64-4 /* align to 16byte boundary */
sub r7,r4,r3 /* compute offset to src from dest */
- lwz r9,0(r9) /* Get cache line size (part 2) */
cmpldi cr0,r8,0 /* Were we aligned on a 16 byte bdy? */
addi r10,r9,-1 /* Cache line mask */
beq+ L(dst_aligned)
@@ -121,7 +124,7 @@ L(dst_aligned):
cmpdi cr0,r9,0 /* Cache line size set? */
bne+ cr0,L(cachelineset)
-/* __cache_line_size not set: generic byte copy without much optimization */
+/* Cache line size not set: generic byte copy without much optimization */
clrldi. r0,r5,63 /* If length is odd copy one byte */
beq L(cachelinenotset_align)
lbz r7,0(r4) /* Read one byte from source */