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authorPaul A. Clarke <pc@us.ibm.com>2019-06-11 14:37:37 -0500
committerPaul A. Clarke <pc@us.ibm.com>2019-06-19 20:20:02 -0500
commit49bc41b64239c4726f31fa35a1af4f22fb41d51f (patch)
tree02c06c7754786b89a892ffc797e1a7f0414c3e81 /sysdeps/powerpc/fpu_control.h
parent335c1007bf183163c0a19724111a64097955b325 (diff)
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[powerpc] add 'volatile' to asm
Add 'volatile' keyword to a few asm statements, to force the compiler to generate the instructions therein. Some instances were implicitly volatile, but adding keyword for consistency. 2019-06-19 Paul A. Clarke <pc@us.ibm.com> * sysdeps/powerpc/fpu/fenv_libc.h (relax_fenv_state): Add 'volatile'. * sysdeps/powerpc/fpu/fpu_control.h (__FPU_MFFS): Likewise. (__FPU_MFFSL): Likewise. (_FPU_SETCW): Likewise.
Diffstat (limited to 'sysdeps/powerpc/fpu_control.h')
-rw-r--r--sysdeps/powerpc/fpu_control.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/sysdeps/powerpc/fpu_control.h b/sysdeps/powerpc/fpu_control.h
index 07ccc84..fa04a67 100644
--- a/sysdeps/powerpc/fpu_control.h
+++ b/sysdeps/powerpc/fpu_control.h
@@ -67,7 +67,7 @@ typedef unsigned int fpu_control_t;
/* Macros for accessing the hardware control word. */
# define __FPU_MFFS() \
({register double __fr; \
- __asm__ ("mffs %0" : "=f" (__fr)); \
+ __asm__ __volatile__("mffs %0" : "=f" (__fr)); \
__fr; \
})
@@ -81,7 +81,7 @@ typedef unsigned int fpu_control_t;
#ifdef _ARCH_PWR9
# define __FPU_MFFSL() \
({register double __fr; \
- __asm__ ("mffsl %0" : "=f" (__fr)); \
+ __asm__ __volatile__("mffsl %0" : "=f" (__fr)); \
__fr; \
})
#else
@@ -101,7 +101,7 @@ typedef unsigned int fpu_control_t;
__u.__ll = 0xfff80000LL << 32; /* This is a QNaN. */ \
__u.__ll |= (cw) & 0xffffffffLL; \
__fr = __u.__d; \
- __asm__ ("mtfsf 255,%0" : : "f" (__fr)); \
+ __asm__ __volatile__("mtfsf 255,%0" : : "f" (__fr)); \
}
/* Default control word set at startup. */