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| author | Joseph Myers <joseph@codesourcery.com> | 2013-06-05 20:44:03 +0000 |
|---|---|---|
| committer | Joseph Myers <joseph@codesourcery.com> | 2013-06-05 20:44:03 +0000 |
| commit | 9c84384cc18ff589233628c193953ca8d7a39f5c (patch) | |
| tree | 95d1f5aee409b208db7545d678012eeae9559fae /sysdeps/powerpc/fpu/feholdexcpt.c | |
| parent | 5556231db2301917cd14a7450de4eba2368c9763 (diff) | |
| download | glibc-9c84384cc18ff589233628c193953ca8d7a39f5c.zip glibc-9c84384cc18ff589233628c193953ca8d7a39f5c.tar.gz glibc-9c84384cc18ff589233628c193953ca8d7a39f5c.tar.bz2 | |
Remove trailing whitespace.
Diffstat (limited to 'sysdeps/powerpc/fpu/feholdexcpt.c')
| -rw-r--r-- | sysdeps/powerpc/fpu/feholdexcpt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sysdeps/powerpc/fpu/feholdexcpt.c b/sysdeps/powerpc/fpu/feholdexcpt.c index 671724b..013d2bf 100644 --- a/sysdeps/powerpc/fpu/feholdexcpt.c +++ b/sysdeps/powerpc/fpu/feholdexcpt.c @@ -32,7 +32,7 @@ feholdexcept (fenv_t *envp) flag. */ new.l[1] = old.l[1] & 7; new.l[0] = old.l[0]; - + /* If the old env had any enabled exceptions, then mask SIGFPE in the MSR FE0/FE1 bits. This may allow the FPU to run faster because it always takes the default action and can not generate SIGFPE. */ |