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authorAndreas Jaeger <aj@suse.de>2005-03-28 09:26:46 +0000
committerAndreas Jaeger <aj@suse.de>2005-03-28 09:26:46 +0000
commitf850220be60d259b62f1f5c5d8b568c105c4ecf2 (patch)
treea339b223ea2c0ef1be9c757a1c90adf0dd795a63 /sysdeps/mips/sys
parentabc85e9fea35a8e2eedfc9796c8d81ae5364bcf7 (diff)
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Update.
* sysdeps/mips/atomicity.h: Remove unused file. * sysdeps/mips/dl-machine.h (elf_machine_rel): Add TLS relocations. * sysdeps/mips/dl-tls.h: New file. * sysdeps/mips/libc-tls.c: New file. * sysdeps/mips/tls-macros.h: New file. * sysdeps/mips/bits/atomic.h: New file. * sysdeps/mips/bits/setjmp.h: Protect against multiple inclusion. * sysdeps/mips/elf/configure.in: New file. * sysdeps/mips/elf/configure: Generated. * sysdeps/mips/sys/asm.h: New file. * sysdeps/unix/sysv/linux/mips/vfork.S: New file. * sysdeps/unix/sysv/linux/mips/clone.S: Add NPTL and five-argument clone support. * sysdeps/unix/sysv/linux/mips/mips32/sysdep.h (INTERNAL_SYSCALL_NCS): New. (INTERNAL_SYSCALL): Update for non-constant support. (internal_syscall0): Likewise. (internal_syscall1): Likewise. (internal_syscall2): Likewise. (internal_syscall3): Likewise. (internal_syscall4): Likewise. (internal_syscall5): Likewise. (internal_syscall6): Likewise. (internal_syscall7): Likewise. * sysdeps/unix/sysv/linux/mips/bits/siginfo.h (SIGEV_THREAD): Update to match the kernel. (SIGEV_CALLBACK): Likewise. (SIGEV_THREAD_ID): Likewise. 2005-03-28 Daniel Jacobowitz <dan@codesourcery.com>
Diffstat (limited to 'sysdeps/mips/sys')
-rw-r--r--sysdeps/mips/sys/asm.h19
1 files changed, 18 insertions, 1 deletions
diff --git a/sysdeps/mips/sys/asm.h b/sysdeps/mips/sys/asm.h
index b04c36b..b590802 100644
--- a/sysdeps/mips/sys/asm.h
+++ b/sysdeps/mips/sys/asm.h
@@ -1,4 +1,5 @@
-/* Copyright (C) 1997, 1998, 2002, 2003, 2004 Free Software Foundation, Inc.
+/* Copyright (C) 1997, 1998, 2002, 2003, 2004, 2005
+ Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by Ralf Baechle <ralf@gnu.org>.
@@ -470,4 +471,20 @@ symbol = value
# define MTC0 dmtc0
#endif
+/* The MIPS archtectures do not have a uniform memory model. Particular
+ platforms may provide additional guarantees - for instance, the R4000
+ LL and SC instructions implicitly perform a SYNC, and the 4K promises
+ strong ordering.
+
+ However, in the absence of those guarantees, we must assume weak ordering
+ and SYNC explicitly where necessary.
+
+ Some obsolete MIPS processors may not support the SYNC instruction. This
+ applies to "true" MIPS I processors; most of the processors which compile
+ using MIPS I implement parts of MIPS II. */
+
+#ifndef MIPS_SYNC
+# define MIPS_SYNC sync
+#endif
+
#endif /* sys/asm.h */