Fix m68k bits/fenv.h for no-FPU ColdFire.

The m68k bits/fenv.h is in sysdeps/m68k/fpu/, meaning that no-FPU
ColdFire instead gets the generic (top-level) bits/fenv.h.

That top-level bits/fenv.h defines no rounding mode constants.  That
no longer works for building glibc tests: some tests fail to build (at
least with warnings) if no rounding mode macros are defined, so at
least FE_TONEAREST must be defined in all cases (as various
architectures without rounding mode support indeed do), while
__FE_UNDEFINED must be defined in the case where not all the standard
rounding modes are supported.

On general principles of supporting multilib toolchains with a single
set of headers shared between multilibs for a given architecture, it's
also desirable for the same bits/fenv.h header to work for both FPU
and no-FPU configurations.  Thus, this patch moves the m68k
bits/fenv.h to sysdeps/m68k/bits/fenv.h, and inserts appropriate
conditionals to handle the no-FPU case.  All the exception macros, and
FE_NOMASK_ENV, are disabled in the no-FPU case; FE_ALL_EXCEPT is
defined to 0 in that case.  All rounding modes except FE_TONEAREST are
disabled in that case, and __FE_UNDEFINED is defined accordingly.  To
avoid an unnecessary ABI change, fenv_t is defined in the no-FPU case
to match the definition it would have got from the generic
bits/fenv.h.

This suffices to get a clean glibc and testsuite build for this
configuration with build-many-glibcs.py (and keeps a clean build for
the other m68k configurations); it has not been otherwise tested.

	* sysdeps/m68k/fpu/bits/fenv.h: Move to ....
	* sysdeps/m68k/bits/fenv.h: ... here.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__] (FE_INEXACT): Do
	not define.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__] (FE_DIVBYZERO):
	Likewise.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__] (FE_UNDERFLOW):
	Likewise.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__] (FE_OVERFLOW):
	Likewise.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__] (FE_INVALID):
	Likewise.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__] (FE_ALL_EXCEPT):
	Define to 0.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__]
	(__FE_UNDEFINED): New enum constant.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__] (FE_TOWARDZERO):
	Do not define.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__] (FE_DOWNWARD):
	Likewise.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__] (FE_UPWARD):
	Likewise.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__] (fenv_t): Define
	to match generic bits/fenv.h.
	[!__HAVE_68881__ && !__HAVE_FPU__ && !__mcffpu__] (FE_NOMASK_ENV):
	Do not define.

1 files changed, 47 insertions, 11 deletions

diff --git a/sysdeps/m68k/fpu/bits/fenv.h b/sysdeps/m68k/bits/fenv.h
index 29508af..7050cef 100644
--- a/sysdeps/m68k/fpu/bits/fenv.h
+++ b/sysdeps/m68k/bits/fenv.h
@@ -20,28 +20,30 @@
 #endif
 
 
+#if defined __HAVE_68881__ || defined __HAVE_FPU__ || defined __mcffpu__
+
 /* Define bits representing the exception.  We use the bit positions of
    the appropriate bits in the FPSR Accrued Exception Byte.  */
 enum
   {
     FE_INEXACT =
-#define FE_INEXACT	(1 << 3)
+# define FE_INEXACT	(1 << 3)
       FE_INEXACT,
     FE_DIVBYZERO =
-#define FE_DIVBYZERO	(1 << 4)
+# define FE_DIVBYZERO	(1 << 4)
       FE_DIVBYZERO,
     FE_UNDERFLOW =
-#define FE_UNDERFLOW	(1 << 5)
+# define FE_UNDERFLOW	(1 << 5)
       FE_UNDERFLOW,
     FE_OVERFLOW =
-#define FE_OVERFLOW	(1 << 6)
+# define FE_OVERFLOW	(1 << 6)
       FE_OVERFLOW,
     FE_INVALID =
-#define FE_INVALID	(1 << 7)
+# define FE_INVALID	(1 << 7)
       FE_INVALID
   };
 
-#define FE_ALL_EXCEPT \
+# define FE_ALL_EXCEPT \
 	(FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
 
 /* The m68k FPU supports all of the four defined rounding modes.  We use
@@ -50,24 +52,44 @@ enum
 enum
   {
     FE_TONEAREST =
-#define FE_TONEAREST	0
+# define FE_TONEAREST	0
       FE_TONEAREST,
     FE_TOWARDZERO =
-#define FE_TOWARDZERO	(1 << 4)
+# define FE_TOWARDZERO	(1 << 4)
       FE_TOWARDZERO,
     FE_DOWNWARD =
-#define FE_DOWNWARD	(2 << 4)
+# define FE_DOWNWARD	(2 << 4)
       FE_DOWNWARD,
     FE_UPWARD =
-#define FE_UPWARD	(3 << 4)
+# define FE_UPWARD	(3 << 4)
       FE_UPWARD
   };
 
+#else
+
+/* In the soft-float case, only rounding to nearest is supported, with
+   no exceptions.  */
+
+# define FE_ALL_EXCEPT 0
+
+enum
+  {
+    __FE_UNDEFINED = -1,
+
+    FE_TONEAREST =
+# define FE_TONEAREST	0
+      FE_TONEAREST
+  };
+
+#endif
+
 
 /* Type representing exception flags.  */
 typedef unsigned int fexcept_t;
 
 
+#if defined __HAVE_68881__ || defined __HAVE_FPU__ || defined __mcffpu__
+
 /* Type representing floating-point environment.  This structure
    corresponds to the layout of the block written by `fmovem'.  */
 typedef struct
@@ -78,10 +100,24 @@ typedef struct
   }
 fenv_t;
 
+#else
+
+/* Keep ABI compatibility with the type used in the generic
+   bits/fenv.h, formerly used for no-FPU ColdFire.  */
+typedef struct
+  {
+    fexcept_t __excepts;
+  }
+fenv_t;
+
+#endif
+
 /* If the default argument is used we use this value.  */
 #define FE_DFL_ENV	((const fenv_t *) -1)
 
-#ifdef __USE_GNU
+#if defined __USE_GNU && (defined __HAVE_68881__	\
+			  || defined __HAVE_FPU__	\
+			  || defined __mcffpu__)
 /* Floating-point environment where none of the exceptions are masked.  */
 # define FE_NOMASK_ENV	((const fenv_t *) -2)
 #endif