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| author | H.J. Lu <hongjiu.lu@intel.com> | 2009-07-31 11:53:35 -0700 |
|---|---|---|
| committer | Ulrich Drepper <drepper@redhat.com> | 2009-07-31 11:53:35 -0700 |
| commit | 6f6f1215f68e5ae15ad18373234815fe7b2acc9e (patch) | |
| tree | c6ca7c84df2663d2af45a5ebb47e1cb7d181e31d /sysdeps/i386/i686/cacheinfo.c | |
| parent | 1877ea16ca0714abd715d6ce0aa1b840c3850241 (diff) | |
| download | glibc-6f6f1215f68e5ae15ad18373234815fe7b2acc9e.zip glibc-6f6f1215f68e5ae15ad18373234815fe7b2acc9e.tar.gz glibc-6f6f1215f68e5ae15ad18373234815fe7b2acc9e.tar.bz2 | |
Support multiarch for i686.
This patch adds multiarch support when configured for i686. I modified
some x86-64 functions to support 32bit. I will contribute 32bit SSE string
and memory functions later.
Diffstat (limited to 'sysdeps/i386/i686/cacheinfo.c')
| -rw-r--r-- | sysdeps/i386/i686/cacheinfo.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/sysdeps/i386/i686/cacheinfo.c b/sysdeps/i386/i686/cacheinfo.c new file mode 100644 index 0000000..82e4cd2 --- /dev/null +++ b/sysdeps/i386/i686/cacheinfo.c @@ -0,0 +1,8 @@ +#define __x86_64_data_cache_size_half __x86_data_cache_size_half +#define __x86_64_shared_cache_size __x86_shared_cache_size +#define __x86_64_shared_cache_size_half __x86_shared_cache_size_half + +#define DISABLE_PREFETCHW +#define DISABLE_PREFERRED_MEMORY_INSTRUCTION + +#include <sysdeps/x86_64/cacheinfo.c> |