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author | Ulrich Drepper <drepper@redhat.com> | 2004-03-05 10:29:47 +0000 |
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committer | Ulrich Drepper <drepper@redhat.com> | 2004-03-05 10:29:47 +0000 |
commit | afdca0f2a3a18fb0dcfc334c205e0fb96e90e839 (patch) | |
tree | 59ba9a29d6174ebbbbe09258ea52e9f956e33c2e /sysdeps/i386/fpu | |
parent | 20c37dfde1a836a139f6269e8617260f2b90bf52 (diff) | |
download | glibc-afdca0f2a3a18fb0dcfc334c205e0fb96e90e839.zip glibc-afdca0f2a3a18fb0dcfc334c205e0fb96e90e839.tar.gz glibc-afdca0f2a3a18fb0dcfc334c205e0fb96e90e839.tar.bz2 |
Update.
* sysdeps/sparc/sparc64/dl-machine.h: Likewise.
* sysdeps/sparc/sparc32/dl-machine.h: Likewise.
* sysdeps/s390/s390-64/dl-machine.h: Likewise.
* sysdeps/s390/s390-32/dl-machine.h: Likewise.
* sysdeps/powerpc/powerpc64/dl-machine.h: Likewise.
* sysdeps/powerpc/powerpc32/dl-machine.c: Likewise.
* sysdeps/m68k/dl-machine.h: Likewise.
* sysdeps/ia64/dl-machine.h: Likewise.
* sysdeps/arm/dl-machine.h: Likewise.
* sysdeps/alpha/dl-machine.h: Likewise.
Diffstat (limited to 'sysdeps/i386/fpu')
-rw-r--r-- | sysdeps/i386/fpu/fclrexcpt.c | 2 | ||||
-rw-r--r-- | sysdeps/i386/fpu/fedisblxcpt.c | 4 | ||||
-rw-r--r-- | sysdeps/i386/fpu/feenablxcpt.c | 4 | ||||
-rw-r--r-- | sysdeps/i386/fpu/feholdexcpt.c | 4 | ||||
-rw-r--r-- | sysdeps/i386/fpu/fesetround.c | 4 | ||||
-rw-r--r-- | sysdeps/i386/fpu/fsetexcptflg.c | 6 | ||||
-rw-r--r-- | sysdeps/i386/fpu/ftestexcept.c | 4 |
7 files changed, 14 insertions, 14 deletions
diff --git a/sysdeps/i386/fpu/fclrexcpt.c b/sysdeps/i386/fpu/fclrexcpt.c index 0e66d87..34ef070 100644 --- a/sysdeps/i386/fpu/fclrexcpt.c +++ b/sysdeps/i386/fpu/fclrexcpt.c @@ -42,7 +42,7 @@ __feclearexcept (int excepts) __asm__ ("fldenv %0" : : "m" (*&temp)); /* If the CPU supports SSE, we clear the MXCSR as well. */ - if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) + if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xnew_exc; diff --git a/sysdeps/i386/fpu/fedisblxcpt.c b/sysdeps/i386/fpu/fedisblxcpt.c index ef3dd9a..6b0977f 100644 --- a/sysdeps/i386/fpu/fedisblxcpt.c +++ b/sysdeps/i386/fpu/fedisblxcpt.c @@ -1,5 +1,5 @@ /* Disable floating-point exceptions. - Copyright (C) 1999, 2000, 2003 Free Software Foundation, Inc. + Copyright (C) 1999, 2000, 2003, 2004 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Andreas Jaeger <aj@suse.de>, 1999. @@ -39,7 +39,7 @@ fedisableexcept (int excepts) __asm__ ("fldcw %0" : : "m" (*&new_exc)); /* If the CPU supports SSE we set the MXCSR as well. */ - if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) + if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xnew_exc; diff --git a/sysdeps/i386/fpu/feenablxcpt.c b/sysdeps/i386/fpu/feenablxcpt.c index 8bf8bd9..afd8dc7 100644 --- a/sysdeps/i386/fpu/feenablxcpt.c +++ b/sysdeps/i386/fpu/feenablxcpt.c @@ -1,5 +1,5 @@ /* Enable floating-point exceptions. - Copyright (C) 1999, 2000, 2003 Free Software Foundation, Inc. + Copyright (C) 1999, 2000, 2003, 2004 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Andreas Jaeger <aj@suse.de>, 1999. @@ -39,7 +39,7 @@ feenableexcept (int excepts) __asm__ ("fldcw %0" : : "m" (*&new_exc)); /* If the CPU supports SSE we set the MXCSR as well. */ - if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) + if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xnew_exc; diff --git a/sysdeps/i386/fpu/feholdexcpt.c b/sysdeps/i386/fpu/feholdexcpt.c index 2d6cc0d..5509686 100644 --- a/sysdeps/i386/fpu/feholdexcpt.c +++ b/sysdeps/i386/fpu/feholdexcpt.c @@ -1,5 +1,5 @@ /* Store current floating-point environment and clear exceptions. - Copyright (C) 1997, 1999, 2003 Free Software Foundation, Inc. + Copyright (C) 1997, 1999, 2003, 2004 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997. @@ -36,7 +36,7 @@ feholdexcept (fenv_t *envp) __asm__ ("fldcw %0" : : "m" (*&work)); /* If the CPU supports SSE we set the MXCSR as well. */ - if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) + if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xwork; diff --git a/sysdeps/i386/fpu/fesetround.c b/sysdeps/i386/fpu/fesetround.c index fe9889f..2746f3e 100644 --- a/sysdeps/i386/fpu/fesetround.c +++ b/sysdeps/i386/fpu/fesetround.c @@ -1,5 +1,5 @@ /* Set current rounding direction. - Copyright (C) 1997, 2003 Free Software Foundation, Inc. + Copyright (C) 1997, 2003, 2004 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997. @@ -38,7 +38,7 @@ fesetround (int round) __asm__ ("fldcw %0" : : "m" (*&cw)); /* If the CPU supports SSE we set the MXCSR as well. */ - if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) + if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xcw; diff --git a/sysdeps/i386/fpu/fsetexcptflg.c b/sysdeps/i386/fpu/fsetexcptflg.c index d262738..03eeef3 100644 --- a/sysdeps/i386/fpu/fsetexcptflg.c +++ b/sysdeps/i386/fpu/fsetexcptflg.c @@ -1,5 +1,5 @@ /* Set floating-point environment exception handling. - Copyright (C) 1997,99,2000,01 Free Software Foundation, Inc. + Copyright (C) 1997,99,2000,01, 2004 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997. @@ -43,7 +43,7 @@ __fesetexceptflag (const fexcept_t *flagp, int excepts) __asm__ ("fldenv %0" : : "m" (*&temp)); /* If the CPU supports SSE, we set the MXCSR as well. */ - if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) + if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0) { unsigned int xnew_exc; @@ -57,7 +57,7 @@ __fesetexceptflag (const fexcept_t *flagp, int excepts) /* Put the new data in effect. */ __asm__ ("ldmxcsr %0" : : "m" (*&xnew_exc)); } - + /* Success. */ return 0; } diff --git a/sysdeps/i386/fpu/ftestexcept.c b/sysdeps/i386/fpu/ftestexcept.c index f82b355..9038e04 100644 --- a/sysdeps/i386/fpu/ftestexcept.c +++ b/sysdeps/i386/fpu/ftestexcept.c @@ -1,5 +1,5 @@ /* Test exception in current environment. - Copyright (C) 1997, 2003 Free Software Foundation, Inc. + Copyright (C) 1997, 2003, 2004 Free Software Foundation, Inc. This file is part of the GNU C Library. Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997. @@ -33,7 +33,7 @@ fetestexcept (int excepts) __asm__ ("fnstsw %0" : "=a" (temp)); /* If the CPU supports SSE we test the MXCSR as well. */ - if ((GL(dl_hwcap) & HWCAP_I386_XMM) != 0) + if ((GLRO(dl_hwcap) & HWCAP_I386_XMM) != 0) __asm__ ("stmxcsr %0" : "=m" (*&xtemp)); return (temp | xtemp) & excepts & FE_ALL_EXCEPT; |