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author | Wilco Dijkstra <wdijkstr@arm.com> | 2014-10-24 13:06:04 +0000 |
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committer | Wilco Dijkstra <wdijkstr@arm.com> | 2014-10-24 13:06:04 +0000 |
commit | 3a84f1a6516e3b22507f9c03fbd36a5559c3df94 (patch) | |
tree | 953550cbdddaa55e4dbaa0e9b9299eabc5f79981 /sysdeps/aarch64 | |
parent | ea9a7c8b066accc408402fc00c946db7d8eb9764 (diff) | |
download | glibc-3a84f1a6516e3b22507f9c03fbd36a5559c3df94.zip glibc-3a84f1a6516e3b22507f9c03fbd36a5559c3df94.tar.gz glibc-3a84f1a6516e3b22507f9c03fbd36a5559c3df94.tar.bz2 |
Cleanup fedisableexcept to use the same logic as the ARM version. No functional changes.
Diffstat (limited to 'sysdeps/aarch64')
-rw-r--r-- | sysdeps/aarch64/fpu/fedisblxcpt.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/sysdeps/aarch64/fpu/fedisblxcpt.c b/sysdeps/aarch64/fpu/fedisblxcpt.c index c43335c..1ea6e10 100644 --- a/sysdeps/aarch64/fpu/fedisblxcpt.c +++ b/sysdeps/aarch64/fpu/fedisblxcpt.c @@ -24,18 +24,13 @@ fedisableexcept (int excepts) { fpu_control_t fpcr; fpu_control_t fpcr_new; - int original_excepts; _FPU_GETCW (fpcr); - - original_excepts = (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT; - excepts &= FE_ALL_EXCEPT; - fpcr_new = fpcr & ~(excepts << FE_EXCEPT_SHIFT); if (fpcr != fpcr_new) _FPU_SETCW (fpcr_new); - return original_excepts; + return (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT; } |