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| author | Wilco Dijkstra <wdijkstr@arm.com> | 2020-08-28 17:51:40 +0100 |
|---|---|---|
| committer | Wilco Dijkstra <wdijkstr@arm.com> | 2020-10-12 18:28:42 +0100 |
| commit | 64458aabeb7f6d15b389cb49b9faf4925db354fa (patch) | |
| tree | 8732dddbbe462de56a8d6a0b54c25086d962c7e7 /sysdeps/aarch64/multiarch/memcpy.c | |
| parent | 58c6a7ae53c647390a3057c247d34643e1201aac (diff) | |
| download | glibc-64458aabeb7f6d15b389cb49b9faf4925db354fa.zip glibc-64458aabeb7f6d15b389cb49b9faf4925db354fa.tar.gz glibc-64458aabeb7f6d15b389cb49b9faf4925db354fa.tar.bz2 | |
AArch64: Improve backwards memmove performance
On some microarchitectures performance of the backwards memmove improves if
the stores use STR with decreasing addresses. So change the memmove loop
in memcpy_advsimd.S to use 2x STR rather than STP.
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
(cherry picked from commit bd394d131c10c9ec22c6424197b79410042eed99)
Diffstat (limited to 'sysdeps/aarch64/multiarch/memcpy.c')
0 files changed, 0 insertions, 0 deletions