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| author | Roland McGrath <roland@gnu.org> | 2002-09-14 09:07:12 +0000 |
|---|---|---|
| committer | Roland McGrath <roland@gnu.org> | 2002-09-14 09:07:12 +0000 |
| commit | 09af82c9bd093d30c22e3ecf04b8ff310f5cdfa8 (patch) | |
| tree | c3d5a2a3655d82f718580e1d13fd8cc1fb756336 /stdlib | |
| parent | 48c5307058990a7e525b3dfc444e9d996b2cefc6 (diff) | |
| download | glibc-09af82c9bd093d30c22e3ecf04b8ff310f5cdfa8.zip glibc-09af82c9bd093d30c22e3ecf04b8ff310f5cdfa8.tar.gz glibc-09af82c9bd093d30c22e3ecf04b8ff310f5cdfa8.tar.bz2 | |
* stdlib/longlong.h [_ARCH_PPC && W_TYPE_SIZE!=32]: Add powerpc64
specific asm macros for multiple percision integer math.
Diffstat (limited to 'stdlib')
| -rw-r--r-- | stdlib/longlong.h | 99 |
1 files changed, 98 insertions, 1 deletions
diff --git a/stdlib/longlong.h b/stdlib/longlong.h index 540ede0..ab2e9bd 100644 --- a/stdlib/longlong.h +++ b/stdlib/longlong.h @@ -759,7 +759,8 @@ UDItype __umulsidi3 (USItype, USItype); } while (0) #endif /* __ns32000__ */ -#if (defined (_ARCH_PPC) || defined (_IBMR2)) && W_TYPE_SIZE == 32 +#if (defined (_ARCH_PPC) || defined (_IBMR2)) +#if W_TYPE_SIZE == 32 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ do { \ if (__builtin_constant_p (bh) && (bh) == 0) \ @@ -877,6 +878,102 @@ UDItype __umulsidi3 (USItype, USItype); : "r" ((SItype) (nh)), "1" ((SItype) (nl)), "r" ((SItype) (d))) #define UDIV_TIME 100 #endif +#else /* W_TYPE_SIZE != 32. */ +/* Must be powerpc64. */ +#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ + do { \ + if (__builtin_constant_p (bh) && (bh) == 0) \ + __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \ + : "=r" ((UDItype) (sh)), \ + "=&r" ((UDItype) (sl)) \ + : "%r" ((UDItype) (ah)), \ + "%r" ((UDItype) (al)), \ + "rI" ((UDItype) (bl))); \ + else if (__builtin_constant_p (bh) && (bh) ==~(UDItype) 0) \ + __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \ + : "=r" ((UDItype) (sh)), \ + "=&r" ((UDItype) (sl)) \ + : "%r" ((UDItype) (ah)), \ + "%r" ((UDItype) (al)), \ + "rI" ((UDItype) (bl))); \ + else \ + __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \ + : "=r" ((UDItype) (sh)), \ + "=&r" ((UDItype) (sl)) \ + : "%r" ((UDItype) (ah)), \ + "r" ((UDItype) (bh)), \ + "%r" ((UDItype) (al)), \ + "rI" ((UDItype) (bl))); \ + } while (0) +#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ + do { \ + if (__builtin_constant_p (ah) && (ah) == 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \ + : "=r" ((UDItype) (sh)), \ + "=&r" ((UDItype) (sl)) \ + : "r" ((UDItype) (bh)), \ + "rI" ((UDItype) (al)), \ + "r" ((UDItype) (bl))); \ + else if (__builtin_constant_p (ah) && (ah) ==~(UDItype) 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \ + : "=r" ((UDItype) (sh)), \ + "=&r" ((UDItype) (sl)) \ + : "r" ((UDItype) (bh)), \ + "rI" ((UDItype) (al)), \ + "r" ((UDItype) (bl))); \ + else if (__builtin_constant_p (bh) && (bh) == 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \ + : "=r" ((UDItype) (sh)), \ + "=&r" ((UDItype) (sl)) \ + : "r" ((UDItype) (ah)), \ + "rI" ((UDItype) (al)), \ + "r" ((UDItype) (bl))); \ + else if (__builtin_constant_p (bh) && (bh) ==~(UDItype) 0) \ + __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \ + : "=r" ((UDItype) (sh)), \ + "=&r" ((UDItype) (sl)) \ + : "r" ((UDItype) (ah)), \ + "rI" ((UDItype) (al)), \ + "r" ((UDItype) (bl))); \ + else \ + __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \ + : "=r" ((UDItype) (sh)), \ + "=&r" ((UDItype) (sl)) \ + : "r" ((UDItype) (ah)), \ + "r" ((UDItype) (bh)), \ + "rI" ((UDItype) (al)), \ + "r" ((UDItype) (bl))); \ + } while (0) + +#define count_leading_zeros(count, x) \ + __asm__ ("{cntlz|cntlzd} %0,%1" \ + : "=r" (count) \ + : "r" ((UDItype) (x))) +#define COUNT_LEADING_ZEROS_0 64 + +#define umul_ppmm(ph, pl, m0, m1) \ + do { \ + UDItype __m0 = (m0), __m1 = (m1); \ + __asm__ ("mulhdu %0,%1,%2" \ + : "=r" ((UDItype) ph) \ + : "%r" (__m0), \ + "r" (__m1)); \ + (pl) = __m0 * __m1; \ + } while (0) +#define UMUL_TIME 16 + +#define smul_ppmm(ph, pl, m0, m1) \ + do { \ + DItype __m0 = (m0), __m1 = (m1); \ + __asm__ ("mulhd %0,%1,%2" \ + : "=r" ((DItype) ph) \ + : "%r" (__m0), \ + "r" (__m1)); \ + (pl) = __m0 * __m1; \ + } while (0) +#define SMUL_TIME 16 +#define UDIV_TIME 72 +#endif /* W_TYPE_SIZE == 32 */ #endif /* Power architecture variants. */ #if defined (__pyr__) && W_TYPE_SIZE == 32 |