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authorUlrich Drepper <drepper@redhat.com>1999-05-25 22:50:11 +0000
committerUlrich Drepper <drepper@redhat.com>1999-05-25 22:50:11 +0000
commit475e390e80a950a8746dc0b88341742dc99014e4 (patch)
tree25d17609ee32f6f37e9d204d00af0dbcb38121bf /stdlib
parent859a09cff1dc7d626a13e242d035107e7b6d13f8 (diff)
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Update.
1999-05-25 Ulrich Drepper <drepper@cygnus.com> * sysdeps/posix/getcwd.c (__getcwd): Fix potential memory leaks.
Diffstat (limited to 'stdlib')
-rw-r--r--stdlib/longlong.h67
1 files changed, 66 insertions, 1 deletions
diff --git a/stdlib/longlong.h b/stdlib/longlong.h
index d10fa43..7ac63bf 100644
--- a/stdlib/longlong.h
+++ b/stdlib/longlong.h
@@ -1,5 +1,5 @@
/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
- Copyright (C) 1991, 92, 93, 94, 96, 97, 98 Free Software Foundation, Inc.
+ Copyright (C) 1991,92,93,94,96,97,98,99 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
@@ -1174,6 +1174,71 @@ extern USItype __udiv_qrnnd __P ((USItype *, USItype, USItype, USItype));
#endif /* udiv_qrnnd */
#endif /* __sparc__ */
+#if (defined (__sparc_v9__) || (defined (__sparc__) && defined (__arch64__)) \
+ || defined (__sparcv9)) && W_TYPE_SIZE == 64
+#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
+ __asm__ ("addcc %4,%5,%1
+ add %2,%3,%0
+ bcs,a,pn %%xcc, 1f
+ add %0, 1, %0
+ 1:" \
+ : "=r" ((UDItype)(sh)), \
+ "=&r" ((UDItype)(sl)) \
+ : "r" ((UDItype)(ah)), \
+ "r" ((UDItype)(bh)), \
+ "r" ((UDItype)(al)), \
+ "r" ((UDItype)(bl)) \
+ : "cc")
+
+#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
+ __asm__ ("subcc %4,%5,%1
+ sub %2,%3,%0
+ bcs,a,pn %%xcc, 1f
+ sub %0, 1, %0
+ 1:" \
+ : "=r" ((UDItype)(sh)), \
+ "=&r" ((UDItype)(sl)) \
+ : "r" ((UDItype)(ah)), \
+ "r" ((UDItype)(bh)), \
+ "r" ((UDItype)(al)), \
+ "r" ((UDItype)(bl)) \
+ : "cc")
+
+#define umul_ppmm(wh, wl, u, v) \
+ do { \
+ UDItype tmp1, tmp2, tmp3, tmp4; \
+ __asm__ __volatile__ ( \
+ "srl %7,0,%3
+ mulx %3,%6,%1
+ srlx %6,32,%2
+ mulx %2,%3,%4
+ sllx %4,32,%5
+ srl %6,0,%3
+ sub %1,%5,%5
+ srlx %5,32,%5
+ addcc %4,%5,%4
+ srlx %7,32,%5
+ mulx %3,%5,%3
+ mulx %2,%5,%5
+ sethi 0x80000000,%2
+ addcc %4,%3,%4
+ srlx %4,32,%4
+ add %2,%2,%2
+ movcc %%xcc,%%g0,%2
+ addcc %5,%4,%5
+ sllx %3,32,%3
+ add %1,%3,%1
+ add %5,%2,%0" \
+ : "=r" ((UDItype)(wh)), \
+ "=&r" ((UDItype)(wl)), \
+ "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
+ : "r" ((UDItype)(u)), \
+ "r" ((UDItype)(v)) \
+ : "cc"); \
+ } while (0)
+#define UMUL_TIME 96
+#endif /* __sparc_v9__ */
+
#if defined (__vax__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("addl2 %5,%1