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authorMaciej W. Rozycki <macro@codesourcery.com>2013-01-29 13:30:16 +0000
committerMaciej W. Rozycki <macro@codesourcery.com>2013-01-29 13:30:16 +0000
commit29bfb065e387d975e9296c4c25cb2cafe47f6424 (patch)
tree533062c2a1271ffa53043fae3bd263ca571d5ff2 /ports
parent3b60b421b56fbe4380916b2b7faa962f9542eb22 (diff)
downloadglibc-29bfb065e387d975e9296c4c25cb2cafe47f6424.zip
glibc-29bfb065e387d975e9296c4c25cb2cafe47f6424.tar.gz
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MIPS: Correct NewABI syscall wrapper whitespace damage.
Diffstat (limited to 'ports')
-rw-r--r--ports/ChangeLog.mips6
-rw-r--r--ports/sysdeps/unix/sysv/linux/mips/mips64/n32/sysdep.h164
-rw-r--r--ports/sysdeps/unix/sysv/linux/mips/mips64/n64/sysdep.h164
3 files changed, 170 insertions, 164 deletions
diff --git a/ports/ChangeLog.mips b/ports/ChangeLog.mips
index 8a5c843..92553e7 100644
--- a/ports/ChangeLog.mips
+++ b/ports/ChangeLog.mips
@@ -1,3 +1,9 @@
+2013-01-29 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * sysdeps/unix/sysv/linux/mips/mips64/n32/sysdep.h: Correct
+ whitespace damage throughout.
+ * sysdeps/unix/sysv/linux/mips/mips64/n64/sysdep.h: Likewise.
+
2013-01-25 Steve Ellcey <sellcey@mips.com>
* sysdeps/mips/memmove.c: Remove.
diff --git a/ports/sysdeps/unix/sysv/linux/mips/mips64/n32/sysdep.h b/ports/sysdeps/unix/sysv/linux/mips/mips64/n32/sysdep.h
index 73cc847..3ebbf89 100644
--- a/ports/sysdeps/unix/sysv/linux/mips/mips64/n32/sysdep.h
+++ b/ports/sysdeps/unix/sysv/linux/mips/mips64/n32/sysdep.h
@@ -52,14 +52,14 @@
/* Define a macro which expands into the inline wrapper code for a system
call. */
#undef INLINE_SYSCALL
-#define INLINE_SYSCALL(name, nr, args...) \
+#define INLINE_SYSCALL(name, nr, args...) \
({ INTERNAL_SYSCALL_DECL(err); \
- long result_var = INTERNAL_SYSCALL (name, err, nr, args); \
- if ( INTERNAL_SYSCALL_ERROR_P (result_var, err) ) \
- { \
- __set_errno (INTERNAL_SYSCALL_ERRNO (result_var, err)); \
- result_var = -1L; \
- } \
+ long result_var = INTERNAL_SYSCALL (name, err, nr, args); \
+ if ( INTERNAL_SYSCALL_ERROR_P (result_var, err) ) \
+ { \
+ __set_errno (INTERNAL_SYSCALL_ERRNO (result_var, err)); \
+ result_var = -1L; \
+ } \
result_var; })
#undef INTERNAL_SYSCALL_DECL
@@ -81,20 +81,20 @@
internal_syscall##nr (= number, , "r" (__v0), err, args)
#define internal_syscall0(ncs_init, cs_init, input, err, dummy...) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long long __v0 asm("$2") ncs_init; \
register long long __a3 asm("$7"); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set reorder" \
- : "=r" (__v0), "=r" (__a3) \
+ "syscall\n\t" \
+ ".set reorder" \
+ : "=r" (__v0), "=r" (__a3) \
: input \
- : __SYSCALL_CLOBBERS); \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -102,21 +102,21 @@
})
#define internal_syscall1(ncs_init, cs_init, input, err, arg1) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long long __v0 asm("$2") ncs_init; \
- register long long __a0 asm("$4") = ARGIFY (arg1); \
- register long long __a3 asm("$7"); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long long __a0 asm("$4") = ARGIFY (arg1); \
+ register long long __a3 asm("$7"); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set reorder" \
- : "=r" (__v0), "=r" (__a3) \
- : input, "r" (__a0) \
- : __SYSCALL_CLOBBERS); \
+ "syscall\n\t" \
+ ".set reorder" \
+ : "=r" (__v0), "=r" (__a3) \
+ : input, "r" (__a0) \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -124,22 +124,22 @@
})
#define internal_syscall2(ncs_init, cs_init, input, err, arg1, arg2) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long long __v0 asm("$2") ncs_init; \
- register long long __a0 asm("$4") = ARGIFY (arg1); \
- register long long __a1 asm("$5") = ARGIFY (arg2); \
- register long long __a3 asm("$7"); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long long __a0 asm("$4") = ARGIFY (arg1); \
+ register long long __a1 asm("$5") = ARGIFY (arg2); \
+ register long long __a3 asm("$7"); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set\treorder" \
- : "=r" (__v0), "=r" (__a3) \
+ "syscall\n\t" \
+ ".set\treorder" \
+ : "=r" (__v0), "=r" (__a3) \
: input, "r" (__a0), "r" (__a1) \
- : __SYSCALL_CLOBBERS); \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -147,23 +147,23 @@
})
#define internal_syscall3(ncs_init, cs_init, input, err, arg1, arg2, arg3) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long long __v0 asm("$2") ncs_init; \
- register long long __a0 asm("$4") = ARGIFY (arg1); \
- register long long __a1 asm("$5") = ARGIFY (arg2); \
- register long long __a2 asm("$6") = ARGIFY (arg3); \
- register long long __a3 asm("$7"); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long long __a0 asm("$4") = ARGIFY (arg1); \
+ register long long __a1 asm("$5") = ARGIFY (arg2); \
+ register long long __a2 asm("$6") = ARGIFY (arg3); \
+ register long long __a3 asm("$7"); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set\treorder" \
- : "=r" (__v0), "=r" (__a3) \
+ "syscall\n\t" \
+ ".set\treorder" \
+ : "=r" (__v0), "=r" (__a3) \
: input, "r" (__a0), "r" (__a1), "r" (__a2) \
- : __SYSCALL_CLOBBERS); \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -171,23 +171,23 @@
})
#define internal_syscall4(ncs_init, cs_init, input, err, arg1, arg2, arg3, arg4) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long long __v0 asm("$2") ncs_init; \
- register long long __a0 asm("$4") = ARGIFY (arg1); \
- register long long __a1 asm("$5") = ARGIFY (arg2); \
- register long long __a2 asm("$6") = ARGIFY (arg3); \
- register long long __a3 asm("$7") = ARGIFY (arg4); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long long __a0 asm("$4") = ARGIFY (arg1); \
+ register long long __a1 asm("$5") = ARGIFY (arg2); \
+ register long long __a2 asm("$6") = ARGIFY (arg3); \
+ register long long __a3 asm("$7") = ARGIFY (arg4); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set\treorder" \
- : "=r" (__v0), "+r" (__a3) \
- : input, "r" (__a0), "r" (__a1), "r" (__a2) \
- : __SYSCALL_CLOBBERS); \
+ "syscall\n\t" \
+ ".set\treorder" \
+ : "=r" (__v0), "+r" (__a3) \
+ : input, "r" (__a0), "r" (__a1), "r" (__a2) \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -195,24 +195,24 @@
})
#define internal_syscall5(ncs_init, cs_init, input, err, arg1, arg2, arg3, arg4, arg5) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long long __v0 asm("$2") ncs_init; \
- register long long __a0 asm("$4") = ARGIFY (arg1); \
- register long long __a1 asm("$5") = ARGIFY (arg2); \
- register long long __a2 asm("$6") = ARGIFY (arg3); \
- register long long __a3 asm("$7") = ARGIFY (arg4); \
- register long long __a4 asm("$8") = ARGIFY (arg5); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long long __a0 asm("$4") = ARGIFY (arg1); \
+ register long long __a1 asm("$5") = ARGIFY (arg2); \
+ register long long __a2 asm("$6") = ARGIFY (arg3); \
+ register long long __a3 asm("$7") = ARGIFY (arg4); \
+ register long long __a4 asm("$8") = ARGIFY (arg5); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set\treorder" \
- : "=r" (__v0), "+r" (__a3) \
+ "syscall\n\t" \
+ ".set\treorder" \
+ : "=r" (__v0), "+r" (__a3) \
: input, "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4) \
- : __SYSCALL_CLOBBERS); \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -220,26 +220,26 @@
})
#define internal_syscall6(ncs_init, cs_init, input, err, arg1, arg2, arg3, arg4, arg5, arg6) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long long __v0 asm("$2") ncs_init; \
- register long long __a0 asm("$4") = ARGIFY (arg1); \
- register long long __a1 asm("$5") = ARGIFY (arg2); \
- register long long __a2 asm("$6") = ARGIFY (arg3); \
- register long long __a3 asm("$7") = ARGIFY (arg4); \
- register long long __a4 asm("$8") = ARGIFY (arg5); \
- register long long __a5 asm("$9") = ARGIFY (arg6); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long long __a0 asm("$4") = ARGIFY (arg1); \
+ register long long __a1 asm("$5") = ARGIFY (arg2); \
+ register long long __a2 asm("$6") = ARGIFY (arg3); \
+ register long long __a3 asm("$7") = ARGIFY (arg4); \
+ register long long __a4 asm("$8") = ARGIFY (arg5); \
+ register long long __a5 asm("$9") = ARGIFY (arg6); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set\treorder" \
- : "=r" (__v0), "+r" (__a3) \
+ "syscall\n\t" \
+ ".set\treorder" \
+ : "=r" (__v0), "+r" (__a3) \
: input, "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), \
"r" (__a5) \
- : __SYSCALL_CLOBBERS); \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
diff --git a/ports/sysdeps/unix/sysv/linux/mips/mips64/n64/sysdep.h b/ports/sysdeps/unix/sysv/linux/mips/mips64/n64/sysdep.h
index 86a57e0..9d94995 100644
--- a/ports/sysdeps/unix/sysv/linux/mips/mips64/n64/sysdep.h
+++ b/ports/sysdeps/unix/sysv/linux/mips/mips64/n64/sysdep.h
@@ -48,14 +48,14 @@
/* Define a macro which expands into the inline wrapper code for a system
call. */
#undef INLINE_SYSCALL
-#define INLINE_SYSCALL(name, nr, args...) \
+#define INLINE_SYSCALL(name, nr, args...) \
({ INTERNAL_SYSCALL_DECL(err); \
- long result_var = INTERNAL_SYSCALL (name, err, nr, args); \
- if ( INTERNAL_SYSCALL_ERROR_P (result_var, err) ) \
- { \
- __set_errno (INTERNAL_SYSCALL_ERRNO (result_var, err)); \
- result_var = -1L; \
- } \
+ long result_var = INTERNAL_SYSCALL (name, err, nr, args); \
+ if ( INTERNAL_SYSCALL_ERROR_P (result_var, err) ) \
+ { \
+ __set_errno (INTERNAL_SYSCALL_ERRNO (result_var, err)); \
+ result_var = -1L; \
+ } \
result_var; })
#undef INTERNAL_SYSCALL_DECL
@@ -77,20 +77,20 @@
internal_syscall##nr (= number, , "r" (__v0), err, args)
#define internal_syscall0(ncs_init, cs_init, input, err, dummy...) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long __v0 asm("$2") ncs_init; \
register long __a3 asm("$7"); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set reorder" \
- : "=r" (__v0), "=r" (__a3) \
+ "syscall\n\t" \
+ ".set reorder" \
+ : "=r" (__v0), "=r" (__a3) \
: input \
- : __SYSCALL_CLOBBERS); \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -98,21 +98,21 @@
})
#define internal_syscall1(ncs_init, cs_init, input, err, arg1) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long __v0 asm("$2") ncs_init; \
- register long __a0 asm("$4") = (long) (arg1); \
- register long __a3 asm("$7"); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long __a0 asm("$4") = (long) (arg1); \
+ register long __a3 asm("$7"); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set reorder" \
- : "=r" (__v0), "=r" (__a3) \
- : input, "r" (__a0) \
- : __SYSCALL_CLOBBERS); \
+ "syscall\n\t" \
+ ".set reorder" \
+ : "=r" (__v0), "=r" (__a3) \
+ : input, "r" (__a0) \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -120,22 +120,22 @@
})
#define internal_syscall2(ncs_init, cs_init, input, err, arg1, arg2) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long __v0 asm("$2") ncs_init; \
- register long __a0 asm("$4") = (long) (arg1); \
- register long __a1 asm("$5") = (long) (arg2); \
- register long __a3 asm("$7"); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long __a0 asm("$4") = (long) (arg1); \
+ register long __a1 asm("$5") = (long) (arg2); \
+ register long __a3 asm("$7"); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set\treorder" \
- : "=r" (__v0), "=r" (__a3) \
+ "syscall\n\t" \
+ ".set\treorder" \
+ : "=r" (__v0), "=r" (__a3) \
: input, "r" (__a0), "r" (__a1) \
- : __SYSCALL_CLOBBERS); \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -143,23 +143,23 @@
})
#define internal_syscall3(ncs_init, cs_init, input, err, arg1, arg2, arg3) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long __v0 asm("$2") ncs_init; \
- register long __a0 asm("$4") = (long) (arg1); \
- register long __a1 asm("$5") = (long) (arg2); \
- register long __a2 asm("$6") = (long) (arg3); \
- register long __a3 asm("$7"); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long __a0 asm("$4") = (long) (arg1); \
+ register long __a1 asm("$5") = (long) (arg2); \
+ register long __a2 asm("$6") = (long) (arg3); \
+ register long __a3 asm("$7"); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set\treorder" \
- : "=r" (__v0), "=r" (__a3) \
+ "syscall\n\t" \
+ ".set\treorder" \
+ : "=r" (__v0), "=r" (__a3) \
: input, "r" (__a0), "r" (__a1), "r" (__a2) \
- : __SYSCALL_CLOBBERS); \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -167,23 +167,23 @@
})
#define internal_syscall4(ncs_init, cs_init, input, err, arg1, arg2, arg3, arg4) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long __v0 asm("$2") ncs_init; \
- register long __a0 asm("$4") = (long) (arg1); \
- register long __a1 asm("$5") = (long) (arg2); \
- register long __a2 asm("$6") = (long) (arg3); \
- register long __a3 asm("$7") = (long) (arg4); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long __a0 asm("$4") = (long) (arg1); \
+ register long __a1 asm("$5") = (long) (arg2); \
+ register long __a2 asm("$6") = (long) (arg3); \
+ register long __a3 asm("$7") = (long) (arg4); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set\treorder" \
- : "=r" (__v0), "+r" (__a3) \
- : input, "r" (__a0), "r" (__a1), "r" (__a2) \
- : __SYSCALL_CLOBBERS); \
+ "syscall\n\t" \
+ ".set\treorder" \
+ : "=r" (__v0), "+r" (__a3) \
+ : input, "r" (__a0), "r" (__a1), "r" (__a2) \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -191,24 +191,24 @@
})
#define internal_syscall5(ncs_init, cs_init, input, err, arg1, arg2, arg3, arg4, arg5) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long __v0 asm("$2") ncs_init; \
- register long __a0 asm("$4") = (long) (arg1); \
- register long __a1 asm("$5") = (long) (arg2); \
- register long __a2 asm("$6") = (long) (arg3); \
- register long __a3 asm("$7") = (long) (arg4); \
- register long __a4 asm("$8") = (long) (arg5); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long __a0 asm("$4") = (long) (arg1); \
+ register long __a1 asm("$5") = (long) (arg2); \
+ register long __a2 asm("$6") = (long) (arg3); \
+ register long __a3 asm("$7") = (long) (arg4); \
+ register long __a4 asm("$8") = (long) (arg5); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set\treorder" \
- : "=r" (__v0), "+r" (__a3) \
+ "syscall\n\t" \
+ ".set\treorder" \
+ : "=r" (__v0), "+r" (__a3) \
: input, "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4) \
- : __SYSCALL_CLOBBERS); \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \
@@ -216,26 +216,26 @@
})
#define internal_syscall6(ncs_init, cs_init, input, err, arg1, arg2, arg3, arg4, arg5, arg6) \
-({ \
+({ \
long _sys_result; \
\
{ \
register long __v0 asm("$2") ncs_init; \
- register long __a0 asm("$4") = (long) (arg1); \
- register long __a1 asm("$5") = (long) (arg2); \
- register long __a2 asm("$6") = (long) (arg3); \
- register long __a3 asm("$7") = (long) (arg4); \
- register long __a4 asm("$8") = (long) (arg5); \
- register long __a5 asm("$9") = (long) (arg6); \
- __asm__ volatile ( \
- ".set\tnoreorder\n\t" \
+ register long __a0 asm("$4") = (long) (arg1); \
+ register long __a1 asm("$5") = (long) (arg2); \
+ register long __a2 asm("$6") = (long) (arg3); \
+ register long __a3 asm("$7") = (long) (arg4); \
+ register long __a4 asm("$8") = (long) (arg5); \
+ register long __a5 asm("$9") = (long) (arg6); \
+ __asm__ volatile ( \
+ ".set\tnoreorder\n\t" \
cs_init \
- "syscall\n\t" \
- ".set\treorder" \
- : "=r" (__v0), "+r" (__a3) \
+ "syscall\n\t" \
+ ".set\treorder" \
+ : "=r" (__v0), "+r" (__a3) \
: input, "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), \
"r" (__a5) \
- : __SYSCALL_CLOBBERS); \
+ : __SYSCALL_CLOBBERS); \
err = __a3; \
_sys_result = __v0; \
} \