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author | Ryan S. Arnold <rsa@linux.vnet.ibm.com> | 2012-10-30 17:07:18 -0500 |
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committer | Ryan S. Arnold <rsa@linux.vnet.ibm.com> | 2012-10-30 17:07:18 -0500 |
commit | 09dec6c37e3cd967f62795320703647f24545e3e (patch) | |
tree | 78b5597c0aa457682a6215382022348ec87d07c5 /ports/ChangeLog.powerpc | |
parent | 9f45bfe790a59bfc072ef096b21dc701e03bccf9 (diff) | |
download | glibc-09dec6c37e3cd967f62795320703647f24545e3e.zip glibc-09dec6c37e3cd967f62795320703647f24545e3e.tar.gz glibc-09dec6c37e3cd967f62795320703647f24545e3e.tar.bz2 |
Correct cacheline size to 32-bytes for ppc405 memset.S (bug 14595).
This patch also creates a version of memset.S for the ppc476 processor
which uses a 128-byte cacheline size for dcbz insns.
Diffstat (limited to 'ports/ChangeLog.powerpc')
-rw-r--r-- | ports/ChangeLog.powerpc | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/ports/ChangeLog.powerpc b/ports/ChangeLog.powerpc index 642e716..e22a733 100644 --- a/ports/ChangeLog.powerpc +++ b/ports/ChangeLog.powerpc @@ -1,3 +1,12 @@ +2012-09-25 Jason Gunthorpe <jgunthorpe@obsidianresearch.com> + Ryan S. Arnold <rsa@linux.vnet.ibm.com> + + [BZ #14595] + * sysdeps/powerpc/powerpc32/476/memset.S: New file copied from + 405/memset.S to preserve 128-byte cacheline size. + * sysdeps/powerpc/powerpc32/405/memset.S (memset): Fix cacheline size + to 32-bytes for 405, 440, and 464 processors. + 2012-10-19 Roland McGrath <roland@hack.frob.com> * sysdeps/unix/sysv/linux/powerpc/powerpc32/nofpu/nptl/libc.abilist |