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authorUlrich Drepper <drepper@redhat.com>2009-07-29 09:01:04 -0700
committerUlrich Drepper <drepper@redhat.com>2009-07-29 09:01:04 -0700
commit586fa886ad1473759cddf897691fd3c63a6d2360 (patch)
treecdf7ee2bdd0e4276d16c5feec9fed0a5dc9e783f /nptl/sysdeps/x86_64
parent649bf1332071954cbae3e9159708aea1b7c9ae31 (diff)
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Fix x86-64 TCB alignment for future processor versions.
Diffstat (limited to 'nptl/sysdeps/x86_64')
-rw-r--r--nptl/sysdeps/x86_64/tls.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/nptl/sysdeps/x86_64/tls.h b/nptl/sysdeps/x86_64/tls.h
index a51b770..4212038 100644
--- a/nptl/sysdeps/x86_64/tls.h
+++ b/nptl/sysdeps/x86_64/tls.h
@@ -117,7 +117,12 @@ typedef struct
# define TLS_TCB_SIZE sizeof (struct pthread)
/* Alignment requirements for the TCB. */
-# define TLS_TCB_ALIGN __alignof__ (struct pthread)
+//# define TLS_TCB_ALIGN __alignof__ (struct pthread)
+// Normally the above would be correct But we have to store post-AVX
+// vector registers in the TCB and we want the storage to be aligned.
+// unfortunately there isn't yet a type for these values and hence no
+// 32-byte alignment requirement. Make this explicit, for now.
+# define TLS_TCB_ALIGN 32
/* The TCB can have any size and the memory following the address the
thread pointer points to is unspecified. Allocate the TCB there. */