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authorSiddhesh Poyarekar <siddhesh@sourceware.org>2017-06-30 22:58:39 +0530
committerSiddhesh Poyarekar <siddhesh@sourceware.org>2017-06-30 22:58:39 +0530
commit28cfa3a48e59f9c6b9bc25a003a4ede435841382 (patch)
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parentab85da15301c552e3ea4577a6432aa028bee9295 (diff)
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tunables, aarch64: New tunable to override cpu
Add a new tunable (glibc.tune.cpu) to override CPU identification on aarch64. This is useful in two cases: one where it is desirable to pretend to be another CPU for purposes of testing or because routines written for that CPU are beneficial for specific workloads and second where the underlying kernel does not support emulation of MRS to get the MIDR of the CPU. * elf/dl-tunables.h (tunable_is_name): Move from... * elf/dl-tunables.c (is_name): ... here. (parse_tunables, __tunables_init): Adjust. * manual/tunables.texi: Document glibc.tune.cpu. * sysdeps/aarch64/dl-tunables.list: New file. * sysdeps/unix/sysv/linux/aarch64/cpu-features.c (struct cpu_list): New type. (cpu_list): New list of CPU names and their MIDR. (get_midr_from_mcpu): New function. (init_cpu_features): Override MIDR if necessary.
Diffstat (limited to 'manual/tunables.texi')
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diff --git a/manual/tunables.texi b/manual/tunables.texi
index 689e894..9331b03 100644
--- a/manual/tunables.texi
+++ b/manual/tunables.texi
@@ -231,6 +231,14 @@ the ones in @code{sysdeps/x86/cpu-features.h}.
This tunable is specific to i386 and x86-64.
@end deftp
+@deftp Tunable glibc.tune.cpu
+The @code{glibc.tune.cpu=xxx} tunable allows the user to tell @theglibc{} to
+assume that the CPU is @code{xxx} where xxx may have one of these values:
+@code{generic}, @code{thunderxt88}.
+
+This tunable is specific to aarch64.
+@end deftp
+
@deftp Tunable glibc.tune.x86_data_cache_size
The @code{glibc.tune.x86_data_cache_size} tunable allows the user to set
data cache size in bytes for use in memory and string routines.