aboutsummaryrefslogtreecommitdiff
path: root/elf
diff options
context:
space:
mode:
authorUlrich Drepper <drepper@gmail.com>2011-07-20 21:21:03 -0400
committerUlrich Drepper <drepper@gmail.com>2011-07-20 21:21:03 -0400
commit5644ef5461b5d3ff266206d8ee70d4b575ea6658 (patch)
tree193bd218ab8cf9681ee55ff3526a58c4ae0847d1 /elf
parent6986b98a18490e76b16911d1c6b1ba013598d40d (diff)
downloadglibc-5644ef5461b5d3ff266206d8ee70d4b575ea6658.zip
glibc-5644ef5461b5d3ff266206d8ee70d4b575ea6658.tar.gz
glibc-5644ef5461b5d3ff266206d8ee70d4b575ea6658.tar.bz2
Fix check for AVX enablement
The AVX bit is set if the CPU supports AVX. But this doesn't mean the kernel does. Add checks according to Intel's documentation.
Diffstat (limited to 'elf')
-rw-r--r--elf/tst-audit4.c22
-rw-r--r--elf/tst-audit6.c22
2 files changed, 36 insertions, 8 deletions
diff --git a/elf/tst-audit4.c b/elf/tst-audit4.c
index b17d4a6..c4f1d5b 100644
--- a/elf/tst-audit4.c
+++ b/elf/tst-audit4.c
@@ -6,16 +6,30 @@
#include <cpuid.h>
#include <immintrin.h>
+
+static int
+avx_enabled (void)
+{
+ unsigned int eax, ebx, ecx, edx;
+
+ if (__get_cpuid (1, &eax, &ebx, &ecx, &edx) == 0
+ || (ecx & (bit_AVX | bit_OSXSAVE)) != (bit_AVX | bit_OSXSAVE))
+ return 0;
+
+ /* Check the OS has AVX and SSE saving enabled. */
+ asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
+
+ return (eax & 6) == 6;
+}
+
+
extern __m256i audit_test (__m256i, __m256i, __m256i, __m256i,
__m256i, __m256i, __m256i, __m256i);
int
main (void)
{
- unsigned int eax, ebx, ecx, edx;
-
/* Run AVX test only if AVX is supported. */
- if (__get_cpuid (1, &eax, &ebx, &ecx, &edx)
- && (ecx & bit_AVX))
+ if (avx_enabled ())
{
__m256i ymm = _mm256_setzero_si256 ();
__m256i ret = audit_test (ymm, ymm, ymm, ymm, ymm, ymm, ymm, ymm);
diff --git a/elf/tst-audit6.c b/elf/tst-audit6.c
index 1f6dcb1..64209a1 100644
--- a/elf/tst-audit6.c
+++ b/elf/tst-audit6.c
@@ -8,14 +8,28 @@
extern __m128i audit_test (__m128i, __m128i, __m128i, __m128i,
__m128i, __m128i, __m128i, __m128i);
-int
-main (void)
+
+static int
+avx_enabled (void)
{
unsigned int eax, ebx, ecx, edx;
+ if (__get_cpuid (1, &eax, &ebx, &ecx, &edx) == 0
+ || (ecx & (bit_AVX | bit_OSXSAVE)) != (bit_AVX | bit_OSXSAVE))
+ return 0;
+
+ /* Check the OS has AVX and SSE saving enabled. */
+ asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
+
+ return (eax & 6) == 6;
+}
+
+
+int
+main (void)
+{
/* Run AVX test only if AVX is supported. */
- if (__get_cpuid (1, &eax, &ebx, &ecx, &edx)
- && (ecx & bit_AVX))
+ if (avx_enabled ())
{
__m128i xmm = _mm_setzero_si128 ();
__m128i ret = audit_test (xmm, xmm, xmm, xmm, xmm, xmm, xmm, xmm);