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authorLiubov Dmitrieva <ldmitrie@sourceware.org>2013-08-21 18:24:44 +0400
committerLiubov Dmitrieva <ldmitrie@sourceware.org>2013-08-21 18:25:08 +0400
commit46ed103824ff42668ddfc36c1b3fdb9219d48eee (patch)
tree40be39377bcdb50fe223f3ffe492525b7aa7110b
parentd400dcac5e66047f86291d1a4b90fffb6327dc43 (diff)
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i686: Skip SSE4_2 version for strcmp, strncmp, strncase, strcasecmp
if bit_Slow_SSE4_2 is set.
-rw-r--r--ChangeLog7
-rw-r--r--sysdeps/i386/i686/multiarch/strcasecmp.S4
-rw-r--r--sysdeps/i386/i686/multiarch/strcmp.S4
-rw-r--r--sysdeps/i386/i686/multiarch/strncase.S4
4 files changed, 19 insertions, 0 deletions
diff --git a/ChangeLog b/ChangeLog
index 5340c40..a875ac3 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,10 @@
+2013-08-21 Liubov Dmitrieva <liubov.dmitrieva@intel.com>
+
+ * sysdeps/i386/i686/multiarch/strcmp.S: Skip SSE4_2
+ version if bit_Slow_SSE4_2 is set.
+ * sysdeps/i386/i686/multiarch/strncase.S: Likewise.
+ * sysdeps/i386/i686/multiarch/strcasecmp.S: Likewise.
+
2013-07-23 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
[BZ #15867]
diff --git a/sysdeps/i386/i686/multiarch/strcasecmp.S b/sysdeps/i386/i686/multiarch/strcasecmp.S
index 2444af2..25de4da 100644
--- a/sysdeps/i386/i686/multiarch/strcasecmp.S
+++ b/sysdeps/i386/i686/multiarch/strcasecmp.S
@@ -37,6 +37,8 @@ ENTRY(__strcasecmp)
leal __strcasecmp_ssse3@GOTOFF(%ebx), %eax
testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features@GOTOFF(%ebx)
jz 2f
+ testl $bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features@GOTOFF(%ebx)
+ jnz 2f
leal __strcasecmp_sse4_2@GOTOFF(%ebx), %eax
2: popl %ebx
cfi_adjust_cfa_offset (-4)
@@ -56,6 +58,8 @@ ENTRY(__strcasecmp)
leal __strcasecmp_ssse3, %eax
testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
jz 2f
+ testl $bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features
+ jnz 2f
leal __strcasecmp_sse4_2, %eax
2: ret
END(__strcasecmp)
diff --git a/sysdeps/i386/i686/multiarch/strcmp.S b/sysdeps/i386/i686/multiarch/strcmp.S
index 7dc2cef..41dd3b3 100644
--- a/sysdeps/i386/i686/multiarch/strcmp.S
+++ b/sysdeps/i386/i686/multiarch/strcmp.S
@@ -68,6 +68,8 @@ ENTRY(STRCMP)
leal __STRCMP_SSSE3@GOTOFF(%ebx), %eax
testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features@GOTOFF(%ebx)
jz 2f
+ testl $bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features@GOTOFF(%ebx)
+ jnz 2f
leal __STRCMP_SSE4_2@GOTOFF(%ebx), %eax
2: popl %ebx
cfi_adjust_cfa_offset (-4)
@@ -87,6 +89,8 @@ ENTRY(STRCMP)
leal __STRCMP_SSSE3, %eax
testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
jz 2f
+ testl $bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features
+ jnz 2f
leal __STRCMP_SSE4_2, %eax
2: ret
END(STRCMP)
diff --git a/sysdeps/i386/i686/multiarch/strncase.S b/sysdeps/i386/i686/multiarch/strncase.S
index 939cd96..de97e1b 100644
--- a/sysdeps/i386/i686/multiarch/strncase.S
+++ b/sysdeps/i386/i686/multiarch/strncase.S
@@ -37,6 +37,8 @@ ENTRY(__strncasecmp)
leal __strncasecmp_ssse3@GOTOFF(%ebx), %eax
testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features@GOTOFF(%ebx)
jz 2f
+ testl $bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features@GOTOFF(%ebx)
+ jnz 2f
leal __strncasecmp_sse4_2@GOTOFF(%ebx), %eax
2: popl %ebx
cfi_adjust_cfa_offset (-4)
@@ -56,6 +58,8 @@ ENTRY(__strncasecmp)
leal __strncasecmp_ssse3, %eax
testl $bit_SSE4_2, CPUID_OFFSET+index_SSE4_2+__cpu_features
jz 2f
+ testl $bit_Slow_SSE4_2, CPUID_OFFSET+index_Slow_SSE4_2+__cpu_features
+ jnz 2f
leal __strncasecmp_sse4_2, %eax
2: ret
END(__strncasecmp)