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authorDavid S. Miller <davem@davemloft.net>2013-01-15 20:59:54 -0800
committerDavid S. Miller <davem@davemloft.net>2013-01-15 20:59:54 -0800
commitc42d5e9862d9e62d2864d11f628b1e8b5be13ac2 (patch)
tree1810c25365032cc736e305172c07867f67691891
parentc19a9f896c8ab28ad205e3ccf561ca8e9ebf426f (diff)
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Optimize nearbyint{,f} on sparc.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile: Add vis3 nearbyint{,f} to libm-sysdep_routes. * sysdeps/sparc/sparc64/fpu/multiarch/Makefile: Likewise. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S: New file. * sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S: New file. * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S: New file. * sysdeps/sparc/sparc64/fpu/s_nearbyint.S: New file. * sysdeps/sparc/sparc64/fpu/s_nearbyintf.S: New file.
-rw-r--r--ChangeLog22
-rw-r--r--sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile3
-rw-r--r--sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S65
-rw-r--r--sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S19
-rw-r--r--sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S61
-rw-r--r--sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S12
-rw-r--r--sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S72
-rw-r--r--sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S64
-rw-r--r--sysdeps/sparc/sparc64/fpu/multiarch/Makefile2
-rw-r--r--sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S61
-rw-r--r--sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S12
-rw-r--r--sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S60
-rw-r--r--sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S12
-rw-r--r--sysdeps/sparc/sparc64/fpu/s_nearbyint.S63
-rw-r--r--sysdeps/sparc/sparc64/fpu/s_nearbyintf.S62
15 files changed, 588 insertions, 2 deletions
diff --git a/ChangeLog b/ChangeLog
index 924dee9..a8d4b58 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,27 @@
2013-01-15 David S. Miller <davem@davemloft.net>
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile: Add vis3
+ nearbyint{,f} to libm-sysdep_routes.
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile: Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S:
+ New file.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S: New
+ file.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S:
+ New file.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S: New
+ file.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S: New file.
+ * sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S: New
+ file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S: New
+ file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S: New file.
+ * sysdeps/sparc/sparc64/fpu/s_nearbyint.S: New file.
+ * sysdeps/sparc/sparc64/fpu/s_nearbyintf.S: New file.
+
* sysdeps/ieee754/dbl-64/s_nearbyint.c (__nearbyint): Use
libc_feholdexcept and libc_fesetenv.
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index 561b0ee..aecd93b 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -7,7 +7,8 @@ libm-sysdep_routines += m_copysignf-vis3 m_copysign-vis3 s_ceilf-vis3 \
s_floorf-vis3 s_llrintf-vis3 s_llrint-vis3 \
s_rintf-vis3 s_rint-vis3 w_sqrt-vis3 w_sqrtf-vis3 \
s_fminf-vis3 s_fmin-vis3 s_fmaxf-vis3 s_fmax-vis3 \
- s_fmaf-vis3 s_fma-vis3 s_fdimf-vis3 s_fdim-vis3
+ s_fmaf-vis3 s_fma-vis3 s_fdimf-vis3 s_fdim-vis3 \
+ s_nearbyint-vis3 s_nearbyintf-vis3
sysdep_routines += s_copysignf-vis3 s_copysign-vis3
endif
endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
new file mode 100644
index 0000000..b509500
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
@@ -0,0 +1,65 @@
+/* Round float to int floating-point values without generating
+ an inexact exception, sparc32 v9 vis3 version.
+
+ Copyright (C) 2013 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+#include <math_ldbl_opt.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__nearbyint_vis3)
+ st %fsr, [%sp + 88]
+ sethi %hi(TWO_FIFTYTWO), %o2
+ sethi %hi(0xf8003e0), %o5
+ ld [%sp + 88], %o4
+ sllx %o0, 32, %o0
+ or %o5, %lo(0xf8003e0), %o5
+ or %o0, %o1, %o0
+ movxtod %o0, %f0
+ andn %o4, %o5, %o4
+ fzero ZERO
+ st %o4, [%sp + 80]
+ sllx %o2, 32, %o2
+ fnegd ZERO, SIGN_BIT
+ ld [%sp + 80], %fsr
+ movxtod %o2, %f16
+ fabsd %f0, %f14
+ fcmpd %fcc3, %f14, %f16
+ fmovduge %fcc3, ZERO, %f16
+ fand %f0, SIGN_BIT, SIGN_BIT
+ for %f16, SIGN_BIT, %f16
+ faddd %f0, %f16, %f6
+ fsubd %f6, %f16, %f0
+ fabsd %f0, %f0
+ for %f0, SIGN_BIT, %f0
+ retl
+ ld [%sp + 88], %fsr
+END (__nearbyint_vis3)
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S
new file mode 100644
index 0000000..47da9ea
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S
@@ -0,0 +1,19 @@
+#include <sparc-ifunc.h>
+#include <math_ldbl_opt.h>
+
+SPARC_ASM_VIS3_IFUNC(nearbyint)
+
+weak_alias (__nearbyint, nearbyint)
+
+#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
+compat_symbol (libm, __nearbyint, nearbyintl, GLIBC_2_1)
+#endif
+
+# undef weak_alias
+# define weak_alias(a, b)
+# undef compat_symbol
+# define compat_symbol(a, b, c, d)
+
+#define __nearbyint __nearbyint_generic
+
+#include "../s_nearbyint.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
new file mode 100644
index 0000000..336126d
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
@@ -0,0 +1,61 @@
+/* Round float to int floating-point values without generating
+ an inexact exception, sparc32 v9 vis3 version.
+
+ Copyright (C) 2013 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__nearbyintf_vis3)
+ st %fsr, [%sp + 88]
+ movwtos %o0, %f1
+ sethi %hi(TWO_TWENTYTHREE), %o2
+ sethi %hi(0xf8003e0), %o5
+ ld [%sp + 88], %o4
+ fzeros ZERO
+ or %o5, %lo(0xf8003e0), %o5
+ fnegs ZERO, SIGN_BIT
+ andn %o4, %o5, %o4
+ st %o4, [%sp + 80]
+ ld [%sp + 80], %fsr
+ movwtos %o2, %f16
+ fabss %f1, %f14
+ fcmps %fcc3, %f14, %f16
+ fmovsuge %fcc3, ZERO, %f16
+ fands %f1, SIGN_BIT, SIGN_BIT
+ fors %f16, SIGN_BIT, %f16
+ fadds %f1, %f16, %f5
+ fsubs %f5, %f16, %f0
+ fabss %f0, %f0
+ fors %f0, SIGN_BIT, %f0
+ retl
+ ld [%sp + 88], %fsr
+END (__nearbyintf_vis3)
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S
new file mode 100644
index 0000000..95100c1
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(nearbyintf)
+
+weak_alias (__nearbyintf, nearbyintf)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __nearbyintf __nearbyintf_generic
+
+#include "../s_nearbyintf.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S
new file mode 100644
index 0000000..ee6a575
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S
@@ -0,0 +1,72 @@
+/* Round float to int floating-point values without generating
+ an inexact exception, sparc32 v9 version.
+
+ Copyright (C) 2013 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+#include <math_ldbl_opt.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__nearbyint)
+ st %fsr, [%sp + 88]
+ sethi %hi(TWO_FIFTYTWO), %o2
+ sethi %hi(0xf8003e0), %o5
+ ld [%sp + 88], %o4
+ sllx %o0, 32, %o0
+ or %o5, %lo(0xf8003e0), %o5
+ or %o0, %o1, %o0
+ andn %o4, %o5, %o4
+ fzero ZERO
+ st %o4, [%sp + 80]
+ stx %o0, [%sp + 72]
+ sllx %o2, 32, %o2
+ fnegd ZERO, SIGN_BIT
+ ldd [%sp + 72], %f0
+ ld [%sp + 80], %fsr
+ stx %o2, [%sp + 72]
+ fabsd %f0, %f14
+ ldd [%sp + 72], %f16
+ fcmpd %fcc3, %f14, %f16
+ fmovduge %fcc3, ZERO, %f16
+ fand %f0, SIGN_BIT, SIGN_BIT
+ for %f16, SIGN_BIT, %f16
+ faddd %f0, %f16, %f6
+ fsubd %f6, %f16, %f0
+ fabsd %f0, %f0
+ for %f0, SIGN_BIT, %f0
+ retl
+ ld [%sp + 88], %fsr
+END (__nearbyint)
+weak_alias (__nearbyint, nearbyint)
+
+#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
+compat_symbol (libm, __nearbyint, nearbyintl, GLIBC_2_1)
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S
new file mode 100644
index 0000000..4225b54
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S
@@ -0,0 +1,64 @@
+/* Round float to int floating-point values without generating
+ an inexact exception, sparc32 v9 version.
+
+ Copyright (C) 2013 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__nearbyintf)
+ st %fsr, [%sp + 88]
+ st %o0, [%sp + 68]
+ sethi %hi(TWO_TWENTYTHREE), %o2
+ sethi %hi(0xf8003e0), %o5
+ ld [%sp + 88], %o4
+ fzeros ZERO
+ or %o5, %lo(0xf8003e0), %o5
+ fnegs ZERO, SIGN_BIT
+ andn %o4, %o5, %o4
+ st %o4, [%sp + 80]
+ ld [%sp + 68], %f1
+ ld [%sp + 80], %fsr
+ st %o2, [%sp + 68]
+ fabss %f1, %f14
+ ld [%sp + 68], %f16
+ fcmps %fcc3, %f14, %f16
+ fmovsuge %fcc3, ZERO, %f16
+ fands %f1, SIGN_BIT, SIGN_BIT
+ fors %f16, SIGN_BIT, %f16
+ fadds %f1, %f16, %f5
+ fsubs %f5, %f16, %f0
+ fabss %f0, %f0
+ fors %f0, SIGN_BIT, %f0
+ retl
+ ld [%sp + 88], %fsr
+END (__nearbyintf)
+weak_alias (__nearbyintf, nearbyintf)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index 7a5a9dd..eff225e 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -9,7 +9,7 @@ libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 s_ceilf-vis3 \
s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 \
s_rint-vis3 s_fminf-vis3 s_fmin-vis3 \
s_fmaxf-vis3 s_fmax-vis3 s_fmaf-vis3 \
- s_fma-vis3
+ s_fma-vis3 s_nearbyint-vis3 s_nearbyintf-vis3
sysdep_routines += s_signbitf-vis3 s_signbit-vis3 s_finitef-vis3 \
s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
s_isnanf-vis3 s_isnan-vis3
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S
new file mode 100644
index 0000000..f2071d6
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S
@@ -0,0 +1,61 @@
+/* Round float to int floating-point values without generating
+ an inexact exception, sparc64 vis3 version.
+
+ Copyright (C) 2013 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__nearbyint_vis3)
+ stx %fsr, [%sp + STACK_BIAS + 144]
+ sethi %hi(TWO_FIFTYTWO), %o2
+ sllx %o2, 32, %o2
+ ldx [%sp + STACK_BIAS + 144], %o4
+ sethi %hi(0xf8003e0), %o5
+ fzero ZERO
+ or %o5, %lo(0xf8003e0), %o5
+ fnegd ZERO, SIGN_BIT
+ andn %o4, %o5, %o4
+ movxtod %o2, %f16
+ stx %o4, [%sp + STACK_BIAS + 136]
+ ldx [%sp + STACK_BIAS + 136], %fsr
+ fabsd %f0, %f14
+ fcmpd %fcc3, %f14, %f16
+ fmovduge %fcc3, ZERO, %f16
+ fand %f0, SIGN_BIT, SIGN_BIT
+ for %f16, SIGN_BIT, %f16
+ faddd %f0, %f16, %f6
+ fsubd %f6, %f16, %f0
+ fabsd %f0, %f0
+ for %f0, SIGN_BIT, %f0
+ retl
+ ldx [%sp + STACK_BIAS + 144], %fsr
+END (__nearbyint_vis3)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S
new file mode 100644
index 0000000..bb75ab3
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(nearbyint)
+
+weak_alias (__nearbyint, nearbyint)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __nearbyint __nearbyint_generic
+
+#include "../s_nearbyint.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S
new file mode 100644
index 0000000..b08928f
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S
@@ -0,0 +1,60 @@
+/* Round float to int floating-point values without generating
+ an inexact exception, sparc64 vis3 version.
+
+ Copyright (C) 2013 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__nearbyintf_vis3)
+ stx %fsr, [%sp + STACK_BIAS + 144]
+ sethi %hi(0xf8003e0), %o5
+ sethi %hi(TWO_TWENTYTHREE), %o2
+ ldx [%sp + STACK_BIAS + 144], %o4
+ or %o5, %lo(0xf8003e0), %o5
+ fzeros ZERO
+ andn %o4, %o5, %o4
+ fnegs ZERO, SIGN_BIT
+ movwtos %o2, %f16
+ stx %o4, [%sp + STACK_BIAS + 136]
+ ldx [%sp + STACK_BIAS + 136], %fsr
+ fabss %f1, %f14
+ fcmps %fcc3, %f14, %f16
+ fmovsuge %fcc3, ZERO, %f16
+ fands %f1, SIGN_BIT, SIGN_BIT
+ fors %f16, SIGN_BIT, %f16
+ fadds %f1, %f16, %f5
+ fsubs %f5, %f16, %f0
+ fabss %f0, %f0
+ fors %f0, SIGN_BIT, %f0
+ retl
+ ldx [%sp + STACK_BIAS + 144], %fsr
+END (__nearbyintf_vis3)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S
new file mode 100644
index 0000000..95100c1
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S
@@ -0,0 +1,12 @@
+#include <sparc-ifunc.h>
+
+SPARC_ASM_VIS3_IFUNC(nearbyintf)
+
+weak_alias (__nearbyintf, nearbyintf)
+
+# undef weak_alias
+# define weak_alias(a, b)
+
+#define __nearbyintf __nearbyintf_generic
+
+#include "../s_nearbyintf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/s_nearbyint.S b/sysdeps/sparc/sparc64/fpu/s_nearbyint.S
new file mode 100644
index 0000000..963e4bc
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/s_nearbyint.S
@@ -0,0 +1,63 @@
+/* Round float to int floating-point values without generating
+ an inexact exception, sparc64 version.
+
+ Copyright (C) 2013 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_FIFTYTWO 0x43300000 /* 2**52 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__nearbyint)
+ stx %fsr, [%sp + STACK_BIAS + 144]
+ sethi %hi(TWO_FIFTYTWO), %o2
+ sllx %o2, 32, %o2
+ ldx [%sp + STACK_BIAS + 144], %o4
+ sethi %hi(0xf8003e0), %o5
+ fzero ZERO
+ or %o5, %lo(0xf8003e0), %o5
+ fnegd ZERO, SIGN_BIT
+ andn %o4, %o5, %o4
+ stx %o2, [%sp + STACK_BIAS + 128]
+ stx %o4, [%sp + STACK_BIAS + 136]
+ ldx [%sp + STACK_BIAS + 136], %fsr
+ fabsd %f0, %f14
+ ldd [%sp + STACK_BIAS + 128], %f16
+ fcmpd %fcc3, %f14, %f16
+ fmovduge %fcc3, ZERO, %f16
+ fand %f0, SIGN_BIT, SIGN_BIT
+ for %f16, SIGN_BIT, %f16
+ faddd %f0, %f16, %f6
+ fsubd %f6, %f16, %f0
+ fabsd %f0, %f0
+ for %f0, SIGN_BIT, %f0
+ retl
+ ldx [%sp + STACK_BIAS + 144], %fsr
+END (__nearbyint)
+weak_alias (__nearbyint, nearbyint)
diff --git a/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S b/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S
new file mode 100644
index 0000000..4ff2905
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S
@@ -0,0 +1,62 @@
+/* Round float to int floating-point values without generating
+ an inexact exception, sparc64 version.
+
+ Copyright (C) 2013 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+ Contributed by David S. Miller <davem@davemloft.net>, 2013.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+ /* We pop constants into the FPU registers using the incoming
+ argument stack slots, since this avoid having to use any PIC
+ references. We also thus avoid having to allocate a register
+ window.
+
+ VIS instructions are used to facilitate the formation of
+ easier constants, and the propagation of the sign bit. */
+
+#define TWO_TWENTYTHREE 0x4b000000 /* 2**23 */
+
+#define ZERO %f10 /* 0.0 */
+#define SIGN_BIT %f12 /* -0.0 */
+
+ENTRY (__nearbyintf)
+ stx %fsr, [%sp + STACK_BIAS + 144]
+ sethi %hi(0xf8003e0), %o5
+ sethi %hi(TWO_TWENTYTHREE), %o2
+ ldx [%sp + STACK_BIAS + 144], %o4
+ or %o5, %lo(0xf8003e0), %o5
+ fzeros ZERO
+ andn %o4, %o5, %o4
+ fnegs ZERO, SIGN_BIT
+ st %o2, [%sp + STACK_BIAS + 128]
+ stx %o4, [%sp + STACK_BIAS + 136]
+ ldx [%sp + STACK_BIAS + 136], %fsr
+ fabss %f1, %f14
+ ld [%sp + STACK_BIAS + 128], %f16
+ fcmps %fcc3, %f14, %f16
+ fmovsuge %fcc3, ZERO, %f16
+ fands %f1, SIGN_BIT, SIGN_BIT
+ fors %f16, SIGN_BIT, %f16
+ fadds %f1, %f16, %f5
+ fsubs %f5, %f16, %f0
+ fabss %f0, %f0
+ fors %f0, SIGN_BIT, %f0
+ retl
+ ldx [%sp + STACK_BIAS + 144], %fsr
+END (__nearbyintf)
+weak_alias (__nearbyintf, nearbyintf)